IP Library Granted Patent US 9,349,861
Granted Patent B1
US 9,349,861 · App. 14/744,078 · Granted May 24, 2016

Silicon-on-insulator substrates having selectively formed strained and relaxed device regions

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Quick Facts
Patent No.
US 9,349,861
App. No.
14/744,078
Granted
May 24, 2016
Kind
B1
Abstract

A method of forming a semiconductor device substrate includes forming a donor wafer having a surface comprising regions of relaxed silicon and regions of relaxed silicon germanium (SiGe); epitaxially growing a silicon device layer on the surface of the donor wafer, wherein the silicon device layer comprises tensile strained silicon on the regions of relaxed silicon germanium of the donor wafer, and wherein the silicon device layer comprises relaxed silicon on the regions of relaxed silicon of the donor wafer; and transferring the silicon device layer from the donor wafer to a handle wafer comprising a bulk substrate and an insulator layer, so as to form a silicon-on-insulator (SOI) substrate with the silicon device layer maintaining regions of tensile strained silicon and regions of relaxed silicon.

Claims (13)

1. A method of forming a semiconductor device substrate, the method comprising: epitaxially growing a graded silicon germanium (SiGe) buffer layer on a donor substrate and a relaxed SiGe layer on the graded SiGe buffer layer; forming a patterned hardmask on the relaxed SiGe layer; removing selective portions of the graded SiGe buffer layer and the relaxed SiGe layer;

epitaxially growing a plurality of regions of additional relaxed silicon layer on the donor substrate, corresponding to the removed selective portions of the graded SiGe buffer layer and the relaxed SiGe layer; removing the hardmask layer to form a donor wafer comprising a plurality of regions of relaxed SiGe layer, and the plurality of regions of additional relaxed silicon layer; epitaxially growing a silicon device layer on the surface of the donor wafer, wherein the silicon device layer comprises a plurality of regions of tensile strained silicon layer on the plurality of regions of relaxed SiGe layer of the donor wafer, and a plurality of regions of relaxed silicon layer on the plurality of regions of additional relaxed silicon layer of the donor wafer; and transferring the silicon device layer from the donor wafer to a handle wafer comprising a bulk substrate and an insulator layer, so as to form a silicon-on-insulator (SOI) substrate with the silicon device layer maintaining the plurality of regions of tensile strained silicon and the plurality of regions of relaxed silicon.

2. The method of claim 1 , wherein forming the donor wafer further comprises:

forming a spacer over side walls of regions corresponding to the removed selective portions of the graded SiGe buffer layer and the relaxed SiGe layer, wherein the spacer comprises SiN and SiO2.

3. The method of claim 2 , wherein epitaxially growing relaxed SiGe layer comprises growing the relaxed SiGe layer to a thickness such that the graded SiGe buffer layer transitions from initially compressively strained to relaxed.

4. The method of claim 3 , wherein the thickness of the relaxed SiGe layer is about 1-4 microns (μm).

5. The method of claim 1 , wherein epitaxially growing a graded SiGe buffer layer comprises: growing the graded SiGe buffer layer to a thickness such that the graded SiGe buffer layer is initially compressively strained, wherein the thickness of the graded SiGe buffer layer is about 200-600 nanometers (nm); and implanting a defect layer within the graded SiGe buffer layer so as to relax the upper portion thereof.

6. The method of claim 1 , wherein transferring the silicon device layer from the donor wafer to the handle wafer further comprises:

performing a hydrogen species implantation process so as to create a bubble layer below a bottom surface of the silicon device layer;

oxidizing a top surface of the silicon device layer;

bonding the oxidized top surface of the silicon device layer to the insulator layer of the handle wafer; and

cleaving the donor wafer from the handle wafer, at the bubble layer.

7. The method of claim 6 , further comprising planarizing the handle wafer so as to remove remaining portions of the donor wafer from the handle wafer, and wherein an oxide-to-oxide bonding interface maintains regions of tensile strained silicon within the silicon device layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 11, 2020
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: ELPIS TECHNOLOGIES INC.
Reel/Frame 052620/0961 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 19, 2015
From: CHENG, KANGGUO; DORIS, BRUCE B.; KHAKIFIROOZ, ALI; SADANA, DEVENDRA K.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 035946/0167 →