IP Library Patent Application 14748764
Patent Application
App. No. 14/748,764

SEMICONDUCTOR DEVICE, MANUFACTURING METHOD FOR A SEMICONDUCTOR DEVICE, AND NONTRANSITORY COMPUTER READABLE MEDIUM STORING A PATTERN GENERATING PROGRAM

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Quick Facts
Patent No.
US None
App. No.
14/748,764
Abstract

According to one embodiment, a semiconductor device includes a stacked body of N (N is an integer of 2 or more) layers stacked on a semiconductor substrate and openings different in depth surrounded by the stacked body and separated from each other.

Claims (47)

1 . A semiconductor device, comprising:

a stacked body of N (N is an integer of 2 or more) layers stacked on a semiconductor substrate; and

openings different in depth surrounded by the stacked body and separated from each other.

2 . The semiconductor device of claim 1 , comprising a guide pattern configured to be provided on the stacked body to divide the openings.

3 . The semiconductor device of claim 2 , wherein the guide pattern is arranged at a flat portion of the stacked body.

4 . The semiconductor device of claim 1 , wherein the guide pattern is made of a material different from that for the stacked body.

5 . The semiconductor device of claim 1 , wherein

the stacked body includes N layers of word lines; and

the openings are N contact holes corresponding to the N layers of word lines.

6 . The semiconductor device of claim 5 , wherein contact holes in the lower-layer word lines penetrate through the upper-layer word lines.

7 . The semiconductor device of claim 6 , comprising:

N contact plugs embedded into the N contact holes; and

N extracted lines connected to the N layers of word lines via the N contact plugs.

8 . The semiconductor device of claim 7 , comprising a columnar body penetrating through the N layers of word lines, wherein

the columnar body includes:

a central body capable of forming a channel;

a tunnel insulating film formed on an outer peripheral surface of the central body;

a charge trap film formed on an outer peripheral surface of the tunnel insulating film; and

a block insulating film formed on an outer peripheral surface of the charge trap film.

9 . A manufacturing method for a semiconductor device, comprising:

forming a three-dimensional structure on a semiconductor substrate;

forming a guide pattern corresponding to openings in the three-dimensional structure on the three-dimensional structure;

forming resist films different in thickness divided by the guide pattern on the three-dimensional structure; and

etching the three-dimensional structure via the resist films such that the openings are different in depth.

10 . The manufacturing method for a semiconductor device of claim 9 , wherein

the forming resist films different in thickness divided by the guide pattern on the three-dimensional structure includes:

forming resist films equal in thickness and different in area in the guide pattern on the three-dimensional structure; and

reflowing the resist films to cause differences in the thickness of the resist films.

11 . The manufacturing method for a semiconductor device of claim 10 , wherein differences are made in crude density of a light-shielding pattern in an exposure mask for use in light exposure of the resist films to cause differences in areas of the resist films.

12 . The manufacturing method for a semiconductor device of claim 9 , wherein the three-dimensional structure is a stacked body in which word lines and insulating films are alternately stacked.

13 . The manufacturing method for a semiconductor device of claim 12 , wherein depths of the openings are set for each of the word lines in the layers.

14 . The manufacturing method for a semiconductor device of claim 13 , comprising:

forming side-wall insulating films on side walls of the openings; and

embedding into the openings contact plugs electrically connected to the word lines in the layers.

15 . A nontransitory computer readable medium storing a pattern generating program to cause a computer to perform:

extracting a stepped region in a three-dimensional structure;

calculating a guide region around the stepped region; and

arranging a guide pattern in the guide region.

16 . The nontransitory computer readable medium of claim 15 , wherein the guide region is set at a flat portion of the three-dimensional structure.

17 . The nontransitory computer readable medium of claim 15 , wherein the guide pattern is set to surround a lower portion of the stepped region.

18 . A nontransitory computer readable medium storing a pattern generating program to cause a computer to perform:

acquiring depth information of openings different in depth in a three-dimensional structure;

calculating a film thickness distribution of a resist necessary for obtaining the depth;

calculating volume of the resist necessary for obtaining the film thickness distribution in each of the openings; and

generating an extracted pattern of the resist necessary for obtaining the volume in each of the openings.

19 . The nontransitory computer readable medium of claim 18 , wherein the three-dimensional structure is a stacked body in which word lines and insulating films are alternately stacked.

20 . The nontransitory computer readable medium of claim 19 , wherein the depth information is depth information of contact holes for contact with the word lines.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 24, 2015
From: NAGAI, SATOSHI; YONEDA, EIJI; MATSUNAGA, KENTARO; SHO, KOUTAROU
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 035895/0504 →