IP Library Patent Application 14749750
Patent Application
App. No. 14/749,750

INSULATING A VIA IN A SEMICONDUCTOR SUBSTRATE

Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US None
App. No.
14/749,750
Abstract

Insulating a via in a semiconductor substrate, including: applying a first dielectric layer to the semiconductor substrate; and applying a second dielectric layer to the semiconductor substrate, wherein the second dielectric layer is applied on the first dielectric layer, wherein the second dielectric layer is more conformal than the first dielectric layer.

Claims (19)

1 . A method of insulating a via in a semiconductor substrate, the method comprising:

applying a first dielectric layer to the semiconductor substrate; and

applying a second dielectric layer to the semiconductor substrate, wherein the second dielectric layer is applied on the first dielectric layer, wherein the second dielectric layer is more conformal that the first dielectric layer.

2 . The method of claim 1 wherein the first dielectric layer is a chemical vapor deposition (CVD') nitride film.

3 . The method of claim 1 wherein the second dielectric layer is a sub-atmospheric chemical vapor deposition (‘SACVD’) film.

4 . The method of claim 1 further comprising:

placing, on the semiconductor substrate, one or more back end of line (‘BEOL’) components; and

creating, within the semiconductor substrate, a via.

5 . The method of claim 1 wherein the second dielectric layer grows slower on a CVD nitride film than on a silicon surface.

6 . The method of claim 1 wherein the semiconductor substrate is a silicon wafer and the via is a through-silicon via (‘TSV’).

7 . A semiconductor substrate, comprising:

one or more back end of line (‘BEOL’) components;

one or more vias;

a first dielectric layer; and

a second dielectric layer, wherein the second dielectric layer is applied on the first dielectric layer, wherein the second dielectric layer is more conformal that the first dielectric layer.

8 . The semiconductor substrate of claim 7 wherein the first dielectric layer is a chemical vapor deposition (‘CVD’) nitride film.

9 . The semiconductor substrate of claim 7 wherein the second dielectric layer is a sub-atmospheric chemical vapor deposition (‘SACVD’) film.

10 . The semiconductor substrate of claim 7 wherein the second dielectric layer conforms less on a CVD nitride film than on a silicon surface.

11 . The semiconductor substrate of claim 7 wherein the semiconductor substrate is a silicon wafer and the via is a through-silicon via (‘TSV’).

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded May 12, 2021
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES U.S. INC.
Reel/Frame 056987/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 15, 2016
From: GLOBALFOUNDRIES U.S. 2 LLC; GLOBALFOUNDRIES U.S. INC.
To: GLOBALFOUNDRIES INC.
Reel/Frame 037542/0087 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 3, 2016
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: GLOBALFOUNDRIES U.S. 2 LLC
Reel/Frame 037409/0869 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2015
From: COLLINS, CHRISTOPHER; FAROOQ, MUKTA G.; LIN, YOUBO; OAKLEY, JENNIFER A.; PETRARCA, KEVIN S.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 035965/0425 →