Semiconductor device having low dielectric insulating film and manufacturing method of the same

1. A semiconductor device comprising:

a semiconductor substrate including an upper surface and a plurality of active semiconductor elements;

a low dielectric film wiring line laminated structure portion which is provided on the upper surface of the semiconductor substrate, and which has a laminated structure including a plurality of low dielectric films and a plurality of wiring lines, each of the low dielectric films having a relative dielectric constant of 3.0 or lower, and at least one of said plurality of low dielectric films including a porous type film;

a passivation film made of an inorganic material and formed on an upper surface of the low dielectric film wiring line laminated structure portion; and

an organic resin layer including an upper portion which directly contacts with and covers an upper surface of , and a side peripheral portion which directly contacts with and covers a side peripheral surface of the low dielectric film wiring line laminated structure portion, the organic resin layer protecting at least one of the low dielectric films of the low dielectric film wiring line laminated structure portion from peeling off from an under layer or the upper surface of semiconductor substrate, wherein the under layer is formed by another one of the low dielectric films,

wherein the low dielectric films of the low dielectric film wiring line laminated structure portion, the passivation film, and the upper portion of the organic resin layer respectively include a plurality of through openings for an electric connection of the active semiconductor elements, and

wherein a side peripheral surface of the passivation film is located inward from the side peripheral surface of the low dielectric film wiring line laminated structure portion.

2. The semiconductor device according to claim 1 , wherein the organic resin layer includes a sealing film and a protective film provided between the sealing film and the passivation film, and

wherein the sealing film includes the side peripheral portion of the organic resin layer, and covers a side peripheral surface of the protective film.

3. The semiconductor device according to claim 2 , wherein the side peripheral surface of the protective film is located inward from the side peripheral surface of the passivation film to expose a peripheral area thereof, and the sealing film is directly in contact with the peripheral area of the passivation film.

4. The semiconductor device according to claim 2 , wherein the side peripheral surface of the passivation film is located inward from the side peripheral surface of the protective film, and the protective film directly covers the side peripheral surface of the passivation film.

5. The semiconductor device according to claim 1 , wherein the passivation film is patterned using photolithography so that the side peripheral surface of the passivation film is located inward from the side peripheral surface of the low dielectric film wiring line laminated structure portion.

6. The semiconductor device according to claim 1 , further comprising:

a plurality of upper wiring lines which are provided on the upper portion of the organic resin layer, the upper wiring lines being electrically connected to the active semiconductor elements through the wiring lines of the low dielectric film wiring line laminated structure portion,

wherein the upper portion and the side peripheral portion of the organic resin layer are made of the same material.

7. The semiconductor device according to claim 1 , further comprising:

a plurality of upper wiring lines which are provided on the upper portion of the organic resin layer, the upper wiring lines being electrically connected to the active semiconductor elements through the wiring lines of the low dielectric film wiring line laminated structure portion,

wherein the upper portion of the organic resin layer and the side peripheral portion of the organic resin layer are made of different materials.

8. The semiconductor device according to claim 7 wherein the upper portion is made of polyimide, epoxy, phenol, bismaleimide, acryl, synthetic rubber, or polybenzooxide, and the side peripheral portion is made of an epoxy-based resin.

9. The semiconductor device according to claim 7 , wherein the side peripheral surface of the passivation film is located inward from a side peripheral surface of the upper portion of the organic resin layer, so that the side peripheral surface of the passivation film is directly covered with the upper portion of the organic resin layer.

10. The semiconductor device according to claim 7 , wherein the side peripheral portion of the organic resin layer includes a first portion directly covering the side peripheral surface of the passivation film, and a second portion directly covering the side peripheral surface of the low dielectric film wiring line laminated structure portion, and

wherein the first and second portions are made of the same organic resin material.

11. The semiconductor device according to claim 1 , wherein the side peripheral portion of the organic resin layer includes a first portion directly covering the side peripheral surface of the passivation film, and a second portion directly covering the side peripheral surface of the low dielectric film wiring line laminated structure portion, and

wherein the first and second portions are made of different organic resin materials.

12. The semiconductor device according to claim 1 , wherein the side peripheral surface of the passivation film is located inward from a side peripheral surface of the upper portion of the organic resin layer, so that the side peripheral surface of the passivation film is covered with the upper portion of the organic resin layer, and

wherein the side peripheral portion of the organic resin layer has an inner layer which directly contacts with the low dielectric film wiring line laminated structure portion, and an outer layer which covers the inner layer and is made of a different material from than the inner layer.

13. A semiconductor device comprising:

a semiconductor substrate including an upper surface and a plurality of active semiconductor elements;

a low dielectric film wiring line laminated structure portion which is provided on the upper surface of the semiconductor substrate, and which has a laminated structure including a plurality of low dielectric films and a plurality of wiring lines, each of the low dielectric films having a relative dielectric constant of 3.0 or lower, and at least one of said plurality of low dielectric films including a porous type film;

a passivation film made of an inorganic material and formed on an upper surface of the low dielectric film wiring line laminated structure portion;

an organic resin layer including an upper portion which covers an upper surface of the passivation film, and a side peripheral portion which covers a side peripheral surface of the low dielectric film wiring line laminated structure portion, the organic resin layer protecting at least one of the low dielectric films of the low dielectric film wiring line laminated structure portion from peeling off from an adjacent low dielectric film or the upper surface of the semiconductor substrate; and

a plurality of bump electrodes for external connection, formed on an upper side of the low dielectric film wiring line laminated structure portion,

wherein the side peripheral surface of the low dielectric film wiring line laminated structure portion is a cut surface which has been melted and cut by laser beam radiation,

wherein the low dielectric films of the low dielectric film wiring line laminated structure portion, the passivation film, and the upper portion of the organic resin layer respectively include a plurality of through openings for an electric connection of the active semiconductor elements, and

wherein a side peripheral surface of the passivation film is located inward from the side peripheral surface of the low dielectric film wiring line laminated structure portion.

14. The semiconductor device according to claim 13 , wherein the passivation film is patterned using photolithography so that the side peripheral surface of the passivation film is located inward from the side peripheral surface of the low dielectric film wiring line laminated structure portion.

15. The semiconductor device according to claim 13 , wherein side peripheral portion of the organic resin layer includes a first portion directly covering the side peripheral surface of the passivation film, and a second portion directly covering the side peripheral surface of the low dielectric film wiring line laminated structure portion, and

wherein the first and second portions are made of different organic resin materials.

16. The semiconductor device according to claim 13 , wherein side peripheral portion of the organic resin layer includes a first portion directly covering the side peripheral surface of the passivation film, and a second portion directly covering the side peripheral surface of the low dielectric film wiring line laminated structure portion, and

wherein the first and second portions are made of the same organic resin material.

17. The semiconductor device according to claim 13 , wherein a side peripheral surface of the semiconductor substrate is a cut surface which has been melted and cut by laser beam radiation, a portion of the cut surface being covered with the side peripheral portion of the organic resin layer.

18. A semiconductor device comprising:

a semiconductor substrate including an upper surface and a plurality of active semiconductor elements;

a low dielectric film wiring line laminated structure portion which is provided on the upper surface of the semiconductor substrate, and which has a laminated structure including a plurality of low dielectric films and a plurality of wiring lines, each of the low dielectric films having a relative dielectric constant of 3.0 or lower;

a passivation film made of an inorganic material and formed on an upper surface of the low dielectric film wiring line laminated structure portion;

an organic resin layer including an upper portion which covers an upper surface of the passivation film, and a side peripheral portion which covers a side peripheral surface of the low dielectric film wiring line laminated structure portion, so that the low dielectric film wiring line laminated structure portion is prevented from peeling off from the semiconductor substrate, or at least one low dielectric film is prevented from peeling off from an adjacent low dielectric film; and

a plurality of upper wiring lines formed on the upper portion of the organic resin layer and electrically connected to said plurality of active semiconductor elements through the low dielectric film wiring line laminated structure portion,

wherein the side peripheral surface of the low dielectric film wiring line laminated structure portion is a cut surface which has been melted and cut by laser beam radiation,

wherein the low dielectric films of the low dielectric film wiring line laminated structure portion, the passivation film, and the upper portion of the organic resin layer respectively include a plurality of through openings for an electric connection of the active semiconductor elements, and

wherein a side peripheral surface of the passivation film is located inward from the side peripheral surface of the low dielectric film wiring line laminated structure portion and a side peripheral surface of the upper portion of the organic resin layer.

19. The semiconductor device according to claim 18 wherein the side peripheral portion of the organic layer directly contacts with the low dielectric film wiring line laminated structure portion, and

wherein the upper portion and side peripheral portion of the organic resin layer are made of different materials.

20. The semiconductor device according to claim 18 wherein a side peripheral surface of the semiconductor substrate is a cut surface which has been melted and cut by laser beam radiation, a portion of the cut surface being covered with the side peripheral portion of the organic resin layer.