IP Library › Granted Patent US 9,461,043
Granted Patent B1
US 9,461,043 · App. 14/754,627 · Granted Oct 4, 2016

Semiconductor device and manufacturing method thereof

Inventors: Che-Cheng Chang (New Taipei, TW); Chih-Han Lin (Hsinchu, TW); Wei-Ting Chen (Hsinchu, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
H01L27/0886H01L21/823431H01L21/823481H01L29/66477H01L29/66545H01L29/66795H01L29/7848H01L27/1211
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Quick Facts
Patent No.
US 9,461,043
App. No.
14/754,627
Granted
Oct 4, 2016
Kind
B1
Abstract

A semiconductor device includes a substrate, a first gate, a second gate, and an insulating structure. The substrate includes a first fin and a second fin. The first gate is disposed over the first fin. The second gate is disposed over the second fin. A gap is formed between the first gate and the second gate, and the gap gets wider toward the substrate. The insulating structure is disposed in the gap. The insulating structure has a top surface and a bottom surface opposite to each other. The bottom surface faces the substrate. An edge of the top surface facing the first gate is curved inward the top surface.

Claims (29)

1. A semiconductor device, comprising:

a substrate comprising a first fin and a second fin;

a first gate disposed over the first fin;

a second gate disposed over the second fin, wherein a gap is formed between the first gate and the second gate, and the gap gets wider toward the substrate; and

an insulating structure disposed in the gap, wherein the insulating structure has a top surface and a bottom surface opposite to each other, the bottom surface faces the substrate, and an edge of the top surface facing the first gate is curved inward at the top surface.

2. The semiconductor device of claim 1 , wherein an edge of the top surface facing the second gate is curved inward at the top surface.

3. The semiconductor device of claim 1 , further comprising:

a dielectric layer disposed between adjacent two of the first gates.

4. The semiconductor device of claim 3 , wherein the dielectric layer further disposed between adjacent two of the second gates.

5. The semiconductor device of claim 1 , wherein a first angle is formed between the bottom surface of the insulating structure and a side wall of the first gate facing the insulating structure, and the first angle is less than 90 degrees.

6. The semiconductor device of claim 5 , wherein a second angle is formed between the bottom surface of the insulating structure and a side wall of the second gate facing the insulating structure, and the second angle is less than 90 degrees.

7. The semiconductor device of claim 1 , wherein the first gate has a round corner facing the insulating structure and the substrate.

8. The semiconductor device of claim 7 , wherein the second gate has a round corner facing the insulating structure and the substrate.

9. The semiconductor device of claim 1 , wherein the first fin and the second fin are epitaxy structures.

10. The semiconductor device of claim 1 , wherein the first gate has a top surface and a bottom surface opposite to each other, the top surface of the first gate has an edge facing the insulating structure, and the edge is curved toward the top surface of the insulating structure.

11. The semiconductor device of claim 1 , wherein the second gate has a top surface and a bottom surface opposite to each other, the top surface of the second gate has an edge facing the insulating structure, and the edge is curved toward the top surface of the insulating structure.

12. The semiconductor device of claim 1 , wherein the first gate has a top surface and a bottom surface opposite to each other, and the first gate gets wider toward the top surface and gets narrower toward the bottom surface.

13. The semiconductor device of claim 1 , wherein the second gate has a top surface and a bottom surface opposite to each other, and the second gate gets wider toward the top surface and gets narrower toward the bottom surface.

14. The semiconductor device of claim 1 , wherein the insulating structure has a top portion and a bottom portion, the bottom portion is disposed between the top portion and the substrate, the top portion has a substantially constant width, and the width of the bottom portion gets wider toward the substrate.

15. The semiconductor device of claim 1 , wherein the insulating structure has a top portion and a bottom portion, the bottom portion is disposed between the top portion and the substrate, a side wall of the first gate adjacent to the top portion is substantially straight, and the side wall adjacent to the bottom portion is substantially round.

16. The semiconductor device of claim 1 , wherein the insulating structure has a top portion and a bottom portion, the bottom portion is disposed between the top portion and the substrate, a side wall of the second gate adjacent to the top portion is substantially straight, and the side wall adjacent to the bottom portion is substantially round.

17. A semiconductor device, comprising:

a substrate comprising a first fin and a second fin;

a first gate disposed over the first fin;

a second gate disposed over the second fin and separated from the first gate; and

an insulating structure disposed between the first gate and the second gate, wherein the insulating structure has a top surface and a bottom surface opposite to each other, the bottom surface of the insulating structure faces the substrate, an area of the bottom surface of the insulating structure is greater than an area of the top surface of the insulating structure, and an edge of the top surface of the insulating structure facing the first gate is curved inward at the top surface.

18. The semiconductor device of claim 17 , wherein the first gate has a bottom surface facing the substrate, a first angle is formed between the bottom surface of the first gate and a side wall of the first gate facing the second gate, and the first angle is greater than 90 degrees.

19. The semiconductor device of claim 18 , wherein the second gate has a bottom surface facing the substrate, a second angle is formed between the bottom surface of the second gate and a side wall of the second gate facing the first gate, and the second angle is greater than 90 degrees.

20. The semiconductor device of claim 18 , wherein the insulating structure has a top portion and a bottom portion disposed between the top portion and the substrate, and a width of the top portion is shorter than a width of the bottom portion.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 16, 2015
From: CHANG, CHE-CHENG; LIN, CHIH-HAN; CHEN, WEI-TING
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 036109/0418 →
Continuity (3)
Provisional Application 62136295 · Mar 20, 2015
Provisional Application 62158911 · May 8, 2015
Provisional Application 62171050 · Jun 4, 2015