Implementing a hybrid finFET device and nanowire device utilizing selective SGOI
A silicon-on-insulator substrate which includes a semiconductor substrate, a buried oxide layer, and a semiconductor layer is provided. A hard mask layer is formed over a first region of the silicon-on-insulator substrate. A first silicon-germanium layer is epitaxially grown on the semiconductor layer within a second region of the silicon-on-insulator substrate. The second region is at least a portion of the semiconductor layer not covered by the hard mask layer. A thermal annealing process is performed, such that germanium atoms from the first silicon-germanium layer are migrated to the portion of the semiconductor layer to form a second silicon-germanium layer. The hard mask layer is removed. A layer of semiconductor material is epitaxially grown on top of the semiconductor layer and the second silicon-germanium layer, where the layer of semiconductor material composed of the same material as semiconductor layer.
1. A silicon-on-insulator substrate having selectively formed regions, the silicon-on-insulator substrate comprising:
a buried oxide layer present within a first region and a second region;
the first region comprising a first plurality of fins, each fin of the first plurality of fins having an epitaxially grown silicon layer formed on a first silicon layer, wherein the first silicon layer is on the buried oxide layer;
the second region comprising a second plurality of fins, each fin of the second plurality of fins having an epitaxially grown silicon layer formed on an annealed silicon-germanium layer; and
wherein:
the epitaxially grown silicon layer formed on the first silicon layer has a height equal to the epitaxially grown silicon layer formed on the annealed silicon-germanium layer;
the epitaxially grown silicon layer formed on the first silicon layer is of the same material as the epitaxially grown silicon layer formed on the annealed silicon-germanium layer; and
the first silicon-germanium layer has a height equal to the first silicon layer.
2. The silicon-on-insulator substrate of claim 1 , wherein the annealed silicon-germanium layer is a thermally annealed silicon-germanium layer.
3. The silicon-on-insulator substrate of claim 1 , wherein the buried oxide layer comprises silicon oxide.
4. The silicon-on-insulator substrate of claim 1 , wherein the annealed silicon-germanium layer comprises at least 15 percent germanium.
5. The silicon-on-insulator substrate of claim 1 , further comprising a semiconductor substrate present below the buried oxide layer.