IP Library Granted Patent US 10,061,726
Granted Patent B2
US 10,061,726 · App. 14/757,939 · Granted Aug 28, 2018

Precision time management (PTM) for USB retimers that accurately adjusts timestamp fields of isochronous timestamp packets (ITPS)

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Quick Facts
Patent No.
US 10,061,726
App. No.
14/757,939
Granted
Aug 28, 2018
Kind
B2
Abstract

A system and method of conducting precision time management in a universal serial bus system with a retimer. The method includes initiating, from the retimer, a link delay management request on an upstream-facing port of the retimer. The method further includes receiving, at a downstream-facing port of the retimer, a link delay management request and responding to the request received on the downstream-facing port.

Claims (48)

1. A retimer for a universal serial bus comprising:

an upstream-facing port (UFP);

a downstream-facing port (DFP); and

logic to determine a link delay on an upstream link; and

timing adjustment logic to aggregate an upstream link delay, transmission delay in the retimer, and retimer delay and to adjust a master clock timing information of an isochronous timestamp packet by the aggregated delay.

2. The retimer of claim 1 , wherein the logic initiates a link delay management exchange on the upstream port.

3. The retimer of claim 1 , wherein the logic sends a link management packet out the upstream-facing port.

4. The retimer of claim 1 , further comprising:

logic to respond to a link delay management exchange received on the downstream-facing port.

5. The retimer of claim 1 , wherein the logic to determine the link delay comprises:

a link delay management requestor state machine; and

a timeout counter.

6. A universal serial bus (USB) system comprising:

a USB host to be coupled to a USB device;

a retimer having an upstream-facing port directed towards the host and a downstream facing port directed toward the device, the retimer comprising logic to initiate a link delay management exchange on the upstream-facing port and timing adjustment logic to aggregate an upstream link delay, transmission delay in the retimer, and retimer delay and to adjust a master clock timing information of an isochronous timestamp packet by the aggregated delay.

7. The system of claim 6 , wherein the retimer comprises:

logic to respond directly to a link delay management request received on the downstream-facing port.

8. The system of claim 6 , wherein the retimer is instantiated in a USB cable.

9. A method of conducting precision time management in a universal serial bus system with a retimer, the method comprising:

initiating, from the retimer, a link delay management request on an upstream-facing port of the retimer;

aggregating an upstream link delay, transmission delay in the retimer, and retimer delay;

receiving, at a downstream-facing port of the retimer, a link delay management request based on the aggregated delay;

responding to the request received on the downstream-facing port;

receiving an isochronous timestamp packet on the upstream-facing port of the retimer; modifying, in the retimer, the isochronous timestamp packet based, at least in part, on an upstream link delay determined from the link delay management request; and

transmitting the isochronous timestamp packet as modified on the downstream-facing port of the retimer.

10. The method of claim 9 , wherein initiating comprises:

transmitting a link delay management packet on the upstream-facing port;

and maintaining a record of a time the transmitting began.

11. The method of claim 10 , further comprising:

receiving a response link delay management packet on the upstream-facing port in response to the transmitting;

calculating an upstream link delay from data in the response link delay management packet; and

maintaining a record of the upstream link delay in the retimer.

12. The method of claim 9 , wherein responding comprises:

transmitting a response link delay management packet on a downstream-facing port, the response link delay management packet comprising timing information indicating a time interval between receipt of the request and the transmitting of the response.

13. The method of claim 9 , further comprising: maintaining an isochronous timestamp packet delay counter; and incrementing the counter responsive to a precision time management clock.

14. The method of claim 13 , further comprising:

verifying that a delayed bit is not set in the received isochronous timestamp packet;

setting the counter to zero responsive to the verifying;

queuing the received isochronous timestamp packet for transmission on the downstream-facing port of the retimer; and

using values at transmission time for the modifying.

15. The method of claim 9 , wherein modifying comprises: copying a received bus interval boundary to a transmit bus interval boundary sub-field of an isochronous timestamp field of the isochronous timestamp packet; calculating a delta value for a time the isochronous timestamp packet will be transmitted; and inserting the delta value into a delta sub-field of the isochronous timestamp field.

16. The method of claim 15 , wherein the delta value is given by the formula:

Δ tx =link delay+Δ rx +ITP delay counter−correction rxX.

17. The method of claim 9 , further comprising:

recalculating a cyclical redundancy check for the isochronous timestamp packet as modified.

18. The method of claim 9 , further comprising:

identifying a delayed bit is set in the received isochronous timestamp packet; and

transmitting the received packet on the downstream facing port without modification.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 15, 2022
From: INTEL CORPORATION
To: TAHOE RESEARCH, LTD.
Reel/Frame 061175/0176 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 14/479,939 PREVIOUSLY RECORDED ON REEL 040083 FRAME 0988. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Feb 2, 2017
From: MCGOWEN, STEVEN B; CHEN, HUIMIN
To: INTEL CORPORATION
Reel/Frame 041596/0424 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 21, 2016
From: MCGOWAN, STEVEN B.; CHEN, HUIMIN
To: INTEL CORPORATION
Reel/Frame 040083/0988 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 21, 2016
From: MCGOWAN, STEVEN B.; CHEN, HUIMIN
To: INTEL CORPORATION
Reel/Frame 040085/0691 →