Method for manufacturing nanostructure semiconductor light emitting device

1. A method of manufacturing a nanostructure semiconductor light emitting device, the method comprising:

providing a base layer formed of a first conductivity-type semiconductor;

forming a mask including an etch stop layer on the base layer;

forming a plurality of openings with regions of the base layer exposed therethrough, in the mask;

forming a plurality of nanocores by growing the first conductivity-type semiconductor on the exposed regions of the base layer to fill the plurality of openings, entire side surfaces of the plurality of the nanocores being defined by a shape of the openings;

partially removing the mask using the etch stop layer to expose side portions of the plurality of nanocores;

regrowing the plurality of nanocores by supplying a source gas for the first conductivity-type semiconductor; and

sequentially growing an active layer and a second conductivity-type semiconductor layer on surfaces of the plurality of nanocores.

2. The method of claim 1 , wherein the mask includes a first material layer formed on the base layer and provided as the etch stop layer, and a second material layer formed on the first material layer and having an etching rate lower than an etching rate of the first material layer.

3. The method of claim 1 , wherein the mask includes a first material layer, a second material layer, and a third material layer formed sequentially on the base layer, and the second material layer is formed of a material different from materials of the first and third material layers and is provided as the etch stop layer.

4. The method of claim 3 , wherein the first and third material layers are formed of the same material.

5. The method of claim 1 , wherein an etch stop level through the etch stop layer is positioned at a depth equal to or below a point equal to ⅓ of an overall height of the mask, from an upper surface of the base layer.

6. The method of claim 1 , wherein an aspect ratio of the opening is about 5:1 or higher.

7. The method of claim 1 , further comprising forming a diffusion preventing film formed of a material different from a material of the mask on respective inner side walls of the plurality of openings, between the forming of the plurality of openings and the forming of the plurality of nanocores.

8. The method of claim 7 , wherein the forming of the diffusion preventing film includes forming a material film for the diffusion preventing film on a surface of the mask, and removing portions of the material film, positioned on an upper surface of the mask and the exposed regions of the base layer such that only the material film remains on an inner side wall of the opening.

9. The method of claim 7 , further comprising removing the diffusion preventing film from the exposed surface of the nanocores, before the sequentially growing of the active layer and the second conductivity-type semiconductor layer.

10. The method of claim 7 , wherein after the removing of the diffusion preventing film, a portion of the diffusion preventing film positioned below an upper surface level of the etch stop layer remains.

11. The method of claim 1 , wherein widths of the regrown nanocores are larger than widths of the nanocores prior to the regrowing.

12. The method of claim 1 , further comprising, after the forming of the plurality of nanocores, applying a planarizing process to upper surfaces of the plurality of nanocores to be planarized to have the same level.

13. The method of claim 12 , wherein at least a portion of the plurality of nanocores have a diameter that is different from a diameter of other nanocores of the plurality of nanocores, or at least a portion of the plurality of nanocores have an interval therebetween that is different from an interval between other nanocores of the plurality of nanocores.