IP Library › Granted Patent US 10,084,420
Granted Patent B2
US 10,084,420 · App. 14/765,851 · Granted Sep 25, 2018

Multistage amplifier

Inventor: Ryo Kitamura (Kanagawa, JP)
Assignee: PANASONIC CORPORATION
H03F3/45179H03F1/42H03F3/193H03F3/195H03F3/45183H03F3/45475H03G1/0035H03F2200/336H03F2200/405H03F2203/45038H03F2203/45051H03F2203/45212H03F2203/45352H03F2203/45591H03F2203/45594H03F2203/45601H03F2203/45702H03G3/3036
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Quick Facts
Patent No.
US 10,084,420
App. No.
14/765,851
Granted
Sep 25, 2018
Kind
B2
Abstract

Provided is a multistage amplifier that can achieve both utilizing in a broad bandwidth and suppressing gain reduction. The multistage amplifier includes a plurality of differential amplifiers which are connected in series; and a direct-current component limiter that cuts off a direct-current component of input signals, in which the direct-current component limiter is disposed between the plurality of differential amplifiers, and in which a transistor size of a first differential amplifier which is disposed immediately after the direct-current component limiter is equal to or greater than a transistor size of a second differential amplifier which is disposed two stages before the direct-current component limiter.

Claims (24)

1. A multistage amplifier comprising:

a plurality of differential amplifiers which are connected in series and are divided to a plurality of segments; and

a first direct-current component limiter that cuts off a direct-current component of input signals and is disposed between the plurality of segments,

wherein a transistor size of a first differential amplifier which is disposed immediately after the first direct-current component limiter is greater than a transistor size of a second differential amplifier which is disposed two stages before the first direct-current component limiter, and

wherein a transistor size of a predetermined differential amplifier in a plurality of differential amplifiers included in each of the segments is greater than a transistor size of a differential amplifier disposed in a subsequent stage of the predetermined differential amplifier.

2. The multistage amplifier according to claim 1 , wherein the predetermined differential amplifier is a differential amplifier which is disposed in any stage from a first stage to a stage excluding last two stages in the segment.

3. The multistage amplifier according to claim 1 ,

wherein the plurality of differential amplifiers are divided to at least two segments, and

wherein each of the at least two segments includes at least three differential amplifiers.

4. The multistage amplifier according to claim 1 , further comprising, a second direct-current component limiter is disposed immediately after an input terminal of the multistage amplifier.

5. The multistage amplifier according to claim 1 , further comprising,

a third direct-current component limiter is disposed immediately before an output terminal of the multistage amplifier.

6. The multistage amplifier according to claim 1 , wherein the first direct-current component limiter includes a high pass filter (HPF).

7. The multistage amplifier according to claim 1 , wherein the differential amplifier includes a variable gain amplifier.

8. The multistage amplifier according to claim 7 ,

wherein the differential amplifier includes a variable gain amplifier of type Cherry-Hooper, and

wherein the variable gain amplifier of type Cherry-Hooper includes two differential amplifiers.

9. The multistage amplifier according to claim 1 ,

wherein there are a plurality of the multistage amplifiers,

wherein a first multistage amplifier amplifies I signals, and

wherein a second multistage amplifier amplifies Q signals.

10. The multistage amplifier according to claim 1 , wherein no direct-current component limiter is disposed between the second differential amplifier and a third differential amplifier, the third differential amplifier being disposed immediately before the first direct-current component limiter.

11. The multistage amplifier according to claim 10 ,

wherein no direct-current component limiter is disposed between the plurality of differential amplifiers in each of the plurality of segments.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 26, 2015
From: KITAMURA, RYO
To: PANASONIC CORPORATION
Reel/Frame 036431/0463 →
Priority Claims (1)
JP 2013-022562 · Feb 7, 2013 · national
Continuity (1)
Related Publication 20150372652A1 · Dec 24, 2015