Array substrate and manufacturing method thereof, and display device
View Patent ↗An array substrate, a manufacturing method thereof, and a display device are provided. The array substrate includes a peripheral common electrode line for supplying a common voltage and a plurality of sub-pixels. The array substrate further includes first connection portions and second connection portions; the first connection portions extend along a first direction and are provided between the peripheral common electrode line and common electrodes of the sub-pixels adjacent to a side of the peripheral common electrode line along a second direction, for electrically connecting the peripheral common electrode line with the common electrodes of the sub-pixels adjacent to the side of the peripheral common electrode line along the second direction; and the second connection portions extend long the first direction and are provided between the common electrodes of adjacent sub-pixels along the first direction, for electrically connecting the common electrodes of the adjacent sub-pixels along the first direction.
1. A manufacturing method of an array substrate, comprising a process of forming a peripheral common electrode line for supplying a common voltage and a plurality of sub-pixels,
wherein the method further comprises:
forming first connection portions which extend along a first direction and are provided between the peripheral common electrode line and common electrodes of the sub-pixels adjacent to a side of the peripheral common electrode line along a second direction, for electrically connecting the peripheral common electrode line with the common electrodes of the sub-pixels adjacent to the side of the peripheral common electrode line along the second direction; and
forming second connection portions which extend along the first direction and are provided between the common electrodes of adjacent sub-pixels along the first direction, for electrically connecting the common electrodes of the adjacent sub-pixels along the first direction;
wherein the forming the first connection portions which extend along the first direction and are provided between the peripheral common electrode line and the common electrodes of the sub-pixels adjacent to the side of the peripheral common electrode line along the second direction comprises:
forming additional lines connected with the peripheral common electrode line, the additional lines extending along the second direction and provided between the peripheral common electrode line and the common electrodes of the sub-pixels adjacent to the side of the peripheral common electrode line along the second direction;
forming the first connection portions connected with the additional lines between the additional lines and the common electrodes of the sub-pixels adjacent to the side of the additional lines along the second direction.
2. The manufacturing method of the array substrate according to claim 1 , wherein,
the array substrate further comprises gate lines,
the first connection portions and the second connection portions are formed in a same layer with a same material as the gate lines.
3. The manufacturing method of the array substrate according to claim 1 , wherein, the additional lines are provided in a non-display region of the array substrate.
4. An array substrate, comprising a peripheral common electrode line for supplying a common voltage and a plurality of sub-pixels, wherein,
the array substrate further comprises a plurality of first connection portions and second connection portions;
the first connection portions extend along a first direction and are provided between the peripheral common electrode line and common electrodes of the sub-pixels adjacent to a side of the peripheral common electrode line along a second direction, for electrically connecting the peripheral common electrode line with the common electrodes of the sub-pixels adjacent to the side of the peripheral common electrode line along the second direction;
the second connection portions extend along the first direction and are provided between the common electrodes of adjacent sub-pixels along the first direction, for electrically connecting the common electrodes of the adjacent sub-pixels along the first direction; and
the first connection portions are separated from each other and the second connection portions are separated from each other so that no continuous common electrode line for supplying the common voltage and extended along the first direction is provided within a display region of the array substrate.
5. An array substrate, comprising a peripheral common electrode line for supplying a common voltage and a plurality of sub-pixels, wherein,
the array substrate further comprises a plurality of first connection portions and second connection portions;
the first connection portions extend along a first direction and are provided between the peripheral common electrode line and common electrodes of the sub-pixels adjacent to a side of the peripheral common electrode line along a second direction, for electrically connecting the peripheral common electrode line with the common electrodes of the sub-pixels adjacent to the side of the peripheral common electrode line along the second direction;
the second connection portions extend along the first direction and are provided between the common electrodes of adjacent sub-pixels along the first direction, for electrically connecting the common electrodes of the adjacent sub-pixels along the first direction; and
each of the common electrodes of the sub-pixels adjacent to the side of the peripheral common electrode line is electrically connected with both one of the first connection portions and one of the second connection portions, and the peripheral common electrode line, the one of the first connection portions and the one of the second connection portions are arranged sequentially along the first direction.
6. The array substrate according to claim 5 , wherein,
the array substrate further comprises additional lines which extend along the second direction, are provided between the peripheral common electrode line and the common electrodes of the sub-pixels adjacent to the side of the peripheral common electrode line along the second direction and are connected with the peripheral common electrode line; and
the first connection portions are connected with the additional lines.
7. The array substrate according to claim 6 , wherein, the additional lines are provided in a non-display region of the array substrate.
8. The array substrate according to claim 5 , wherein,
the array substrate further comprises gate lines, and the first connection portions and the second connection portions are formed in a same layer with a same material as the gate lines.
9. The array substrate according to claim 5 , wherein,
a width of each of the first connection portions along the second direction and/or a width of each of the second connection portions along the second direction are 1/40- 1/15 of a width of each of the sub-pixels along the second direction.
10. A display device, comprising the array substrate according to claim 5 .