Solder layer of a semiconductor chip arranged within recesses
One semiconductor chip includes a substrate having insulation properties, a plurality of bump electrodes provided on one surface of the substrate, a plurality of recesses provided in the other surface of the substrate, and a solder layer disposed within the recesses. The recesses are formed such that the area of the opening decreases from the other surface side toward the one surface side of the substrate.
1. A semiconductor chip comprising:
a semiconductor substrate;
a plurality of bump electrodes provided on one face side of said substrate;
a plurality of recesses provided on the other face side of said substrate;
a solder layer arranged within said recesses, wherein said recesses are formed so as to have a smaller aperture area from said other face side of said substrate towards said one face side thereof, and wherein the solder layer completely fills said recesses; and
a circuit forming layer disposed between the solder layer and the plurality of bump electrodes.
2. The semiconductor chip as claimed in claim 1 , comprising:
a linkage section passing through from said recess to said one face side of said substrate and formed in said substrate; and
a conductor layer being arranged in said linkage section, wherein said bump electrodes and said solder layer are electrically connected through said conductor layer.
3. The semiconductor chip as claimed in claim 1 , wherein said recesses are formed in conical shape.
4. The semiconductor chip as claimed in claim 1 , wherein said bump electrodes are made of copper.
5. The semiconductor chip as claimed in claim 4 , wherein said copper bump electrodes are formed in a cylindrical pillar shape.