Performance of virtual machine fault tolerance micro-checkpointing using transactional memory
Techniques disclosed herein generally describe providing fault tolerance in a virtual machine cluster using hardware transactional memory. According to one embodiment, a micro-checkpointing tool suspends execution of a virtual machine instance on a primary server. The micro-checkpointing tool identifies one or more memory pages associated with the virtual machine instance that were modified since a previous synchronization. The micro-checkpointing tool maps a first task to an operation to be performed on a memory of the primary server, where the first task is to resume the virtual machine instance. The micro-checkpointing tool also maps a second task to an operation to be performed on the memory of the primary server, where the second task is to copy the identified memory pages associated with the virtual machine instance to a secondary server. The first and second tasks are then performed on the memory.
1. A method comprising:
suspending execution of a virtual machine instance on a primary server a first time to initiate a micro-checkpointing process on the virtual machine instance;
identifying one or more memory pages associated with the virtual machine instance that were modified since a previous synchronization;
mapping a first operation to a first task to be performed on a hardware transactional memory of the primary server, wherein the first operation is to resume the execution of the virtual machine instance on the primary server the first time;
mapping a second operation to a second task to be performed on the hardware transactional memory of the primary server, wherein the second operation is to copy the identified one or more memory pages associated with the virtual machine instance to a secondary server;
beginning performance of both the first task and the second task concurrently on the hardware transactional memory of the primary server by executing the first task via a first L1 cache and executing the second task via a second L1 cache; and
upon determining that the execution of the first task via the first L1 cache and the execution of the second task via the second L1 cache results in a cache overflow in either the first L1 cache or the second L1 cache, aborting the performance of both the first task and the second task concurrently on the hardware transactional memory of the primary server.
2. The method of claim 1 , further comprising:
after aborting the performance of both the first task and the second task concurrently on the hardware transactional memory of the primary server, abandoning the copying of the identified one or more memory pages associated with the virtual machine instance to the secondary server and resuming the execution of the virtual machine instance on the primary server the first time.
3. The method of claim 2 , further comprising:
after resuming the execution of the virtual machine instance on the primary server the first time after aborting the performance of both the first task and the second task concurrently on the hardware transactional memory of the primary server, suspending execution of the virtual machine instance on the primary server a second time;
while execution of the virtual machine instance on the primary server is suspended for the second time:
identifying one or more memory pages associated with the virtual machine instance that were modified since a previous synchronization; and
copying the identified one or more memory pages associated with the virtual machine instance to the secondary server; and
upon receiving an acknowledgement from the secondary server, resuming the execution of the virtual machine instance on the primary server the second time.
4. The method of claim 1 , further comprising:
sending state information of the virtual machine instance to the secondary server.
5. The method of claim 4 , wherein the state information of the virtual machine instance includes at least one of a processor state, a network state, and an I/O state.
6. The method of claim 1 , wherein performing both the first task and the second task concurrently on the hardware transactional memory of the primary server comprises executing the first task on a first processor core and executing the second task on a second processor core in parallel to the execution of the first task on the first processor core.