Edge termination structure having a termination charge region below a recessed field oxide region
View Patent ↗An edge termination structure is disclosed. The edge termination structure includes an active cell in a semiconductor wafer, an edge termination region adjacent the active cell in the semiconductor wafer, where the edge termination region includes a recessed field oxide region and a termination charge region below the recessed field oxide region. The recessed field oxide region may be thermally grown in a recess in the semiconductor wafer. A top surface of the recessed field oxide region is substantially coplanar with a top surface of the semiconductor wafer. The active cell may include at least one insulated-gate bipolar transistor surrounded by the edge termination region in the semiconductor wafer. The termination charge region has a conductivity type opposite of that of the semiconductor wafer. The termination charge region is adjacent to at least one guard ring in the semiconductor wafer.
1. An edge termination structure, comprising:
an active cell in a semiconductor substrate, said active cell including a trenched gate having a conductive filler isolated by a dielectric liner inside said trenched gate;
a recess in said semiconductor substrate;
an edge termination region adjacent said active cell in said semiconductor substrate;
wherein said edge termination region includes a recessed field oxide region, a termination charge region below said recessed field oxide region, and a P+ doped region disposed between said trenched gate and said recessed field oxide region;
wherein said P+ doped region extends deeper into said semiconductor substrate than said termination charge region; and
wherein said recessed field oxide region completely fills said recess.
2. The edge termination structure of claim 1 , wherein a top surface of said recessed field oxide region is substantially coplanar with a top surface of said semiconductor substrate.
3. The edge termination structure of claim 1 , wherein said semiconductor substrate comprises silicon.
4. The edge termination structure of claim 1 , wherein said recessed field oxide region comprises silicon dioxide.
5. The edge termination structure of claim 1 , wherein said active cell comprises at least one insulated-gate bipolar transistor surrounded by said edge termination region in said semiconductor substrate.
6. The edge termination structure of claim 1 , wherein said termination charge region has a conductivity type opposite of that of said semiconductor substrate.
7. The edge termination structure of claim 1 , wherein said termination charge region is adjacent to at least one guard ring in said semiconductor substrate.
8. The edge termination structure of claim 1 , wherein said termination charge region has a substantially constant depth profile under said recessed field oxide region.
9. The edge termination structure of claim 1 , wherein said termination charge region has a variable depth profile under said recessed field oxide region.
10. The edge termination structure of claim 1 , wherein a width of said recessed field oxide region is at least 3 times greater than a depth of said recessed field oxide region.
11. The edge termination structure of claim 10 , wherein said depth of said recessed field oxide region is between approximately 0.3 to 0.5 microns, and wherein said width of said recessed field oxide region is between approximately 1 to 1000 microns.
12. The edge termination structure of claim 1 , wherein said P+ doped region extends deeper into said semiconductor substrate than said trenched gate.
13. The edge termination structure of claim 1 , wherein said P+ doped region forms a guard ring surrounding said active cell.
14. The edge termination structure of claim 1 , wherein said P+ doped region directly contacts said termination charge region to form a junction termination extension edge termination structure in said semiconductor substrate.
15. The edge termination structure of claim 1 , wherein said edge termination region further includes a plurality of field plates formed on a top surface of said semiconductor substrate.
16. The edge termination structure of claim 15 , wherein a first one of said field plates extends onto a dielectric segment formed on said top surface of said semiconductor substrate in a lateral direction towards said active cell, and wherein said P+ doped region is disposed below said dielectric segment between an inner edge of said first field plate and an outer edge of a power electrode disposed in said active cell.
17. The edge termination structure of claim 16 , wherein portions of said power electrode and said first field plate overlap said P+ doped region.
18. The edge termination structure of claim 15 , wherein said edge termination region further includes an additional P+ doped region disposed at a side of said recessed field oxide region opposite said P+ doped region, and wherein a second one of said field plates is disposed over a portion of said recessed field oxide region and said additional P+ doped region.