Edge Termination Using Guard Rings Between Recessed Field Oxide Regions
An edge termination structure is disclosed. The edge termination structure includes an active cell in a semiconductor wafer, an edge termination region adjacent the active cell in the semiconductor wafer, where the edge termination region includes recessed field oxide regions and guard rings adjacent to the active cell. At least one of the guard rings has a depth greater than a depth of at least one of the recessed field oxide regions. A top surface of each of the recessed field oxide regions is substantially coplanar with a top surface of the semiconductor wafer and with a top surface of each of the guard rings. The recessed field oxide regions may be thermally grown in recesses in the semiconductor wafer. The recessed field oxide regions may include silicon dioxide.
1 . An edge termination structure comprising:
an active cell in a semiconductor wafer;
an edge termination region adjacent said active cell in said semiconductor wafer;
wherein said edge termination region includes recessed field oxide regions and guard rings adjacent to said active cell.
2 . The edge termination structure of claim 1 , wherein at least one of said guard rings has a depth greater than a depth of at least one of said recessed field oxide regions.
3 . The edge termination structure of claim 1 , wherein a top surface of each of said recessed field oxide regions is substantially coplanar with a top surface of said semiconductor wafer.
4 . The edge termination structure of claim 1 , wherein a top surface of each of said recessed field oxide regions is substantially coplanar with a top surface of each of said guard rings.
5 . The edge termination structure of claim 1 , wherein said semiconductor wafer comprises silicon.
6 . The edge termination structure of claim 1 , wherein said recessed field oxide regions are thermally grown in a plurality of recesses in said semiconductor wafer.
7 . The edge termination structure of claim 1 , wherein said recessed field oxide regions comprise silicon dioxide.
8 . The edge termination structure of claim 1 , wherein said active cell comprises at least one insulated-gate bipolar transistor surrounded by said edge termination region in said semiconductor wafer.
9 . The edge termination structure of claim 1 , wherein at least one of said guard rings has a conductivity type opposite of that of said semiconductor wafer.
10 . The edge termination structure of claim 1 , wherein said guard rings are tied to an electric potential.
11 . A method of forming an edge termination structure, the method comprising:
forming a plurality of recesses in said semiconductor wafer;
forming recessed field oxide regions in said plurality of recesses;
forming guard rings adjacent to said recessed field oxide regions;
forming an active cell adjacent to at least one of said guard rings.
12 . The method of claim 11 , further comprising forming an oxide layer and a nitride layer over said semiconductor wafer prior to said forming said plurality of recesses.
13 . The method of claim 11 , further comprising planarizing said recessed field oxide regions and said semiconductor wafer prior to said forming said guard rings.
14 . The method of claim 11 , wherein said forming said guard rings comprises implanting termination charges in said semiconductor wafer between said recessed field oxide regions.
15 . The method of claim 11 , wherein at least one of said guard rings has a depth greater than a depth of at least one of said recessed field oxide regions.
16 . The method of claim 11 , wherein a top surface of each of said recessed field oxide regions is substantially coplanar with a top surface of said semiconductor wafer.
17 . The method of claim 11 , wherein a top surface of each of said recessed field oxide regions is substantially coplanar with a top surface of each of said guard rings.
18 . The method of claim 11 , wherein said recessed field oxide regions are thermally grown in said plurality of recesses in said semiconductor wafer.
19 . The method of claim 11 , wherein said active cell comprises at least one insulated-gate bipolar transistor surrounded by said edge termination region in said semiconductor wafer.
20 . The method of claim 11 , wherein at least one of said guard rings has a conductivity type opposite of that of said semiconductor wafer.