CMOS-MEMS device structure, bonding mesa structure and associated method
View Patent ↗The present disclosure provides a CMOS-MEMS device structure. The CMOS-MEMS device structure includes a sensing substrate and a CMOS substrate. The sensing substrate includes a bonding mesa structure. The CMOS substrate includes a top dielectric layer. The sensing substrate and the CMOS substrate are bonded through the bonding mesa structure, and the bonding mesa structure defines a bonding gap between the CMOS substrate and the sensing substrate.
1. A CMOS-MEMS device structure, comprising:
a sensing substrate, comprising a bonding mesa structure, wherein the bonding mesa structure includes a first step bonding mesa and a second step bonding mesa, the second step bonding mesa being wider than the first step bonding mesa; and
a CMOS substrate, comprising a top dielectric layer;
wherein the sensing substrate and the CMOS substrate are bonded through the bonding mesa structure, and the bonding mesa structure defines a bonding gap between the CMOS substrate and the sensing substrate, and the second step bonding mesa is in contact with the top dielectric layer.
2. The CMOS-MEMS device structure of claim 1 , further comprising a cap substrate covering the sensing substrate.
3. The CMOS-MEMS device structure of claim 1 , wherein the sensing substrate and the CMOS substrate are bonded through eutectic metal.
4. The CMOS-MEMS device structure of claim 3 , wherein the eutectic metal comprises Ge and Al.
5. The CMOS-MEMS device structure of claim 1 , wherein the second step bonding mesa and the top dielectric layer define an enclosed space within which eutectic metal is disposed.
6. The CMOS-MEMS device structure of claim 5 , wherein the enclosed space further accommodates the first step bonding mesa.
7. The CMOS-MEMS device structure of claim 1 , wherein the sensing substrate comprises a movable element configured to have a bump structure not in contact with the top dielectric layer.
8. A bonding mesa structure for bonding a first semiconductor structure and a second semiconductor structure, comprising:
a two step bonding mesa disposed on the first semiconductor structure, wherein a bonding metal is connected to the two step bonding mesa, wherein the two step bonding mesa includes a first step bonding mesa and a second step bonding mesa, the second step bonding mesa being in contact with the first semiconductor structure, the first step bonding mesa being in contact with the second step bonding mesa; and
an opening disposed in a surface of the second semiconductor structure, wherein a metal layer in the second semiconductor structure is exposed through the opening;
wherein the first step bonding mesa is inserted into the opening to bring the bonding metal in contact with the metal layer, and the second step bonding mesa is in contact with the surface of the second semiconductor structure.
9. The bonding mesa structure of claim 8 , wherein the second step bonding mesa is wider than the first step bonding mesa.
10. The bonding mesa structure of claim 9 , wherein the bonding metal is in contact with the first step bonding mesa.
11. The bonding mesa structure of claim 10 , wherein a height of the first step bonding mesa is less than a depth of the opening.
12. The bonding mesa structure of claim 10 , wherein the two step bonding mesa and the opening define an enclosed space within which the bonding metal is disposed.
13. A method of fabricating a CMOS-MEMS device structure, comprising:
providing a first semiconductor substrate;
depositing a bonding metal layer on the first semiconductor substrate;
etching a portion of the bonding metal layer to form a bonding metal;
etching the first semiconductor substrate to form a two step bonding mesa, including:
etching the first semiconductor substrate to form a first step bonding mesa; and
etching the first semiconductor substrate to form a second step bonding mesa;
etching the first semiconductor substrate to form a sensing substrate;
providing a second semiconductor substrate including an opening on a surface of the second semiconductor substrate, wherein a metal layer in the second semiconductor substrate is exposed through the opening; and
bonding the first semiconductor substrate to the second semiconductor substrate through the two step bonding mesa, and contacting the second step bonding mesa with the surface of the second semiconductor substrate;
wherein the two step bonding mesa defines a bonding gap between the first semiconductor substrate and the second semiconductor substrate, and the second step bonding mesa is wider than the first step bonding mesa and the opening.
14. The method of claim 13 , further comprising providing a third semiconductor substrate to cover the sensing substrate.
15. The method of claim 13 , wherein when bonded, the second step bonding mesa and the opening define an enclosed space within which the bonding metal is disposed.
16. The method of claim 13 , further comprising etching the first semiconductor substrate to form a bump structure laterally distanced from the two step bonding mesa when forming the two step bonding mesa.
17. The method of claim 16 wherein the etching the first semiconductor substrate to form a sensing substrate comprises forming a movable element configured to have the bump structure thereon.