IP Library Granted Patent US 9,525,061
Granted Patent B2
US 9,525,061 · App. 14/794,843 · Granted Dec 20, 2016

Semiconductor device including an n-well structure

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Quick Facts
Patent No.
US 9,525,061
App. No.
14/794,843
Granted
Dec 20, 2016
Kind
B2
Abstract

A device comprising a p-type base region, and a p-type region formed over the p-type base region and in contact with the p-type base region is disclosed. The device also includes an n-well region surrounded by the p-type region, wherein the n-well is formed from an n-type epitaxial layer and the p-type region is formed by counter-doping the same n-type epitaxial layer.

Claims (34)

1. A device comprising:

a substrate without doped regions which serve as buried doped regions, wherein the substrate comprises a planar top surface; and

a doped epitaxial layer having a planar top epitaxial surface disposed over and contacts the planar top surface of the substrate, wherein the doped epitaxial layer comprises

a first polarity type doped region, the first polarity type doped region corresponds to a device isolation well and a thickness of the doped epitaxial layer defines a depth of the device isolation well, and

a second polarity type doped region sandwiching the first polarity type doped region on both sides of the first polarity type doped region and extends from the planar top epitaxial surface.

2. The device of claim 1 wherein the doped epitaxial layer comprises a constant first polarity type doping throughout the first polarity type doped region of the doped epitaxial layer.

3. The device of claim 2 wherein the second polarity type doped region extends from the planar top epitaxial surface to the planar top surface of the substrate.

4. The device of claim 3 comprising at least a trench isolation region having dielectric material disposed in the doped epitaxial layer, wherein the trench isolation region comprises a top surface which is coplanar with the planar top epitaxial surface.

5. The device of claim 4 comprising a gate structure which contacts the planar top epitaxial surface and over the first polarity type doped region.

6. The device of claim 1 wherein the substrate is a p-type bulk substrate.

7. The device of claim 6 wherein the substrate comprises a resistivity of greater than 1 ohm-cm.

8. The device of claim 6 wherein the substrate comprises a resistivity of 5-15 ohm-cm.

9. The device of claim 1 wherein the substrate is a lightly doped p-type epitaxial region disposed between the doped epitaxial layer and a highly-doped p-type substrate.

10. The device of claim 1 wherein:

the first polarity type comprises n-type; and

the second polarity type comprises p-type.

11. A device comprising:

a substrate without doped regions which serve as buried doped regions, wherein the substrate comprises a planar top surface; and

a doped epitaxial layer having a planar top epitaxial surface disposed over and contacts the planar top surface of the substrate, wherein the doped epitaxial layer comprises

a first polarity type doped region, the first polarity type doped region corresponds to a device isolation well and a thickness of the doped epitaxial layer defines a depth of the device isolation well, and

a first second polarity type doped region sandwiching the first polarity type doped region on both sides of the first polarity type doped region and extends from the planar top epitaxial surface to at least the planar top surface of the substrate.

12. The device of claim 11 further comprising a transistor disposed on the substrate.

13. The device of claim 12 wherein the transistor comprises:

a gate disposed over the first polarity type doped region; and

source and drain regions disposed in the first polarity type doped region and adjacent to opposed sides of the gate.

14. The device of claim 12 wherein the transistor is a first polarity type lateral diffused transistor.

15. The device of claim 14 wherein the doped epitaxial layer comprises a second polarity type doped region that is disposed within and encompassed by the first polarity type doped region.

16. The device of claim 11 wherein:

the first polarity type comprises n-type; and

the second polarity type comprises p-type.

17. The device of claim 16 wherein the doped epitaxial layer comprises a constant n-type doping throughout the first polarity type doped region of the doped epitaxial layer which serves as a deep n-well region.

18. The device of claim 11 wherein the substrate is a lightly doped p-type substrate with a resistivity greater than 1 ohm-cm.

19. The device of claim 18 wherein the doped epitaxial layer comprises a constant first polarity type doping throughout the first polarity type doped region of the doped epitaxial layer.

20. The device of claim 11 wherein the substrate is a highly doped p-type substrate with a resistivity of less than 0.1 ohm-cm.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Nov 19, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
Reel/Frame 054481/0673 →
SECURITY AGREEMENT Recorded Nov 27, 2018
From: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
To: WILMINGTON TRUST, NATIONAL ASSOCIATION
Reel/Frame 047660/0203 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 9, 2015
From: KOO, JEOUNG MO; VERMA, PURAKH RAJ; ZHANG, GUOWEI
To: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
Reel/Frame 036038/0181 →