IP Library Granted Patent US 9,423,866
Granted Patent B2
US 9,423,866 · App. 14/801,010 · Granted Aug 23, 2016

Asynchronous processor that adjusts a respective operating voltage for causing a task to consume substantially all of a respective allocated time interval for the task

Inventor: Gopal Raghavan (Thousand Oaks, CA)
Assignee: Eta Compute, Inc.
G06F1/329G06F1/3203
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Quick Facts
Patent No.
US 9,423,866
App. No.
14/801,010
Granted
Aug 23, 2016
Kind
B2
Abstract

There are disclosed asynchronous computing devices and methods of operating asynchronous computing devices. An asynchronous computing device may include an asynchronous processor and a voltage regulator circuit that outputs an operating voltage to the asynchronous processor in response to a voltage request received from the asynchronous processor.

Claims (46)

1. A computing device, comprising:

an asynchronous processor operative from an operating voltage;

a voltage regulator circuit that outputs the operating voltage to the asynchronous processor in response to a voltage request received from the asynchronous processor; and

a memory coupled to the asynchronous processor, the memory storing a time-aware scheduler and voltage controller program that, when executed by the asynchronous processor, causes the computing device to perform actions including:

scheduling one or more tasks, wherein each task is subject to at least one time constraint, by allocating a respective time interval for the performance of each task such that all time constraints on all of the one or more tasks are satisfied;

selecting, for each of the one or more tasks, a respective operating voltage that causes the performance of each task to consume substantially all of the respective allocated time interval; and

sending respective voltage requests to the voltage regulator circuit to cause the voltage regulator circuit to adjust the respective operating voltage during execution of each of the one or more tasks.

2. The computing device of claim 1 , wherein the asynchronous processor and at least a portion of the voltage regulator circuit are included on the same integrated circuit chip.

3. The computing device of claim 2 , wherein the asynchronous processor and all of the semiconductor components of the voltage regulator circuit are included on the same integrated circuit chip.

4. The computing device of claim 3 , wherein the asynchronous processor and all of the components of the voltage regulator circuit are included on the same integrated circuit chip.

5. The computing device of claim 1 , the actions performed further comprising:

determining, based on a time reference, whether or not all time constraints on all of the one or more tasks are satisfied.

6. The computing device of claim 5 , the actions performed further comprising:

when the result of the determining indicate that a time constraint on a particular task of the one or more tasks was not satisfied, adjusting the selected operating voltage for the particular task.

7. The computing device of claim 1 , wherein

the memory comprises static random access memory operative from the operating voltage.

8. A method of operating an asynchronous processor, comprising:

providing an operating voltage to the asynchronous processor from a voltage regulator circuit responsive to a voltage request received from the asynchronous processor;

scheduling one or more tasks, wherein each task is subject to at least one time constraint, by allocating a respective time interval for the performance of each task such that all time constraints on all of the one or more tasks are satisfied;

selecting, for each of the one or more tasks, a respective operating voltage that causes the performance of each task to consume substantially all of the respective allocated time interval; and

sending respective voltage requests to the voltage regulator circuit to cause the voltage regulator circuit to output the respective operating voltage during execution of each of the one or more tasks.

9. The method of claim 8 , further comprising:

determining, based on a time reference, whether or not all time constraints on all of the one or more tasks are satisfied.

10. The method of claim 9 , further comprising:

when the result of the determining indicate that a time constraint on a particular task of the one or more tasks was not satisfied, adjusting the selected operating voltage for the particular task.

11. A computing device, comprising:

a plurality of asynchronous processor cores operative from respective operating voltages;

a corresponding plurality of voltage regulator circuits, each of which outputs the respective operating voltage to the corresponding asynchronous processor in response to a voltage request; and

a memory coupled to one or more of the plurality of asynchronous processor cores, the memory storing a time-aware scheduler and voltage controller program that, when executed by one or more of the asynchronous processor cores, causes the computing device to perform actions including:

assigning one or more respective tasks, from a plurality of tasks, to each of the plurality of asynchronous processor cores; and

for each of the plurality of asynchronous processor cores:

scheduling the one or more assigned tasks, wherein each assigned task is subject to at least one time constraint, by allocating a respective time interval for the performance of each assigned task such that all time constraints on all of the one or more assigned tasks are satisfied;

selecting, for each of the one or more assigned tasks, a respective operating voltage that causes the performance of each assigned task to consume substantially all of the respective allocated time interval, and

sending respective voltage requests to the corresponding voltage regulator circuit to cause the voltage regulator circuit to set the respective operating voltage during execution of each of the one or more assigned tasks.

12. The computing device of claim 11 , wherein the plurality of asynchronous processor cores and at least portions of the plurality of the voltage regulator circuits are included on the same integrated circuit chip.

13. The computing device of claim 12 , wherein the plurality of asynchronous processor cores and all semiconductor components of the plurality of the voltage regulator circuits are included on the same integrated circuit chip.

14. The computing device of claim 13 , wherein the plurality of asynchronous processor cores and all components of the plurality of the voltage regulator circuits are included on the same integrated circuit chip.

15. A computing device, comprising:

a memory;

an asynchronous processor operative from an operating voltage, the asynchronous processor comprising a collection of asynchronous logic circuits that are collectively capable of executing instructions stored in the memory; and

a voltage regulator circuit that outputs the operating voltage to the asynchronous processor in response to a voltage request received from the asynchronous processor,

wherein the memory stores a time-aware scheduler and voltage controller program that, when executed by the asynchronous processor, causes the computing device to perform actions including:

scheduling one or more tasks;

selecting a respective operating voltage for each of the one or more tasks; and

sending respective voltage requests to the voltage regulator circuit to cause the voltage regulator circuit to adjust the respective operating voltage during execution of each of the one or more tasks.

16. The computing device of claim 15 , where the asynchronous processor does not operate from a clock.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 24, 2024
From: ETA COMPUTE, INC.
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 066232/0020 →
RELEASE OF SECURITY INTEREST Recorded Nov 30, 2023
From: VENTURE LENDING & LEASING VII, INC.; VENTURE LENDING & LEASING VIII, INC.
To: ETA COMPUTE, INC.
Reel/Frame 065724/0293 →
RELEASE OF SECURITY INTEREST Recorded Nov 30, 2023
From: VENTURE LENDING & LEASING IX, INC.; VENTURE LENDING & LEASING VIII, INC.
To: ETA COMPUTE, INC.
Reel/Frame 065724/0500 →
SECURITY INTEREST Recorded Oct 31, 2018
From: ETA COMPUTE, INC.
To: VENTURE LENDING & LEASING IX, INC.; VENTURE LENDING & LEASING VIII, INC.
Reel/Frame 047377/0744 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2016
From: RAGHAVAN, GOPAL
To: ETA COMPUTE, INC.
Reel/Frame 039162/0196 →
SECURITY INTEREST Recorded Apr 1, 2016
From: ETA COMPUTE, INC.
To: VENTURE LENDING & LEASING VII, INC.; VENTURE LENDING & LEASING VIII, INC.
Reel/Frame 038177/0247 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 19, 2015
From: RAGHAVAN, GOPAL
To: ETA COMPUTE, INC.
Reel/Frame 036825/0407 →
Continuity (2)
Provisional Application 62025356 · Jul 16, 2014
Related Publication 20160018869A1 · Jan 21, 2016