IP Library Granted Patent US 9,324,763
Granted Patent B2
US 9,324,763 · App. 14/801,813 · Granted Apr 26, 2016

Method of manufacturing semiconductor device

Inventor: Shintaro Matsuda (Kanagawa, JP)
Assignee: Renesas Electronics Corporation
H01L27/14698H01L21/67356H01L21/67376H01L21/67389H01L21/6835H01L21/6836H01L21/82H01L27/14687H01L2221/6834H01L2221/68327
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Quick Facts
Patent No.
US 9,324,763
App. No.
14/801,813
Granted
Apr 26, 2016
Kind
B2
Abstract

To protect a plurality of semiconductor chips of a sawn wafer housed in a shipping case. A method of manufacturing a semiconductor device includes a step of vacuum packing a sawn wafer while being housed in a shipping case. The shipping case has the following structure. The shipping case has a lid portion that covers the upper surface of the sawn wafer and a body portion that covers the lower surface of the sawn wafer. The lid portion has a recess portion that covers a plurality of semiconductor chips and a ventilation route communicated with the recess portion. In a step of reducing pressure in the shipping case, a gas in the shipping case is discharged outside via a ventilation route.

Claims (35)

1. A method of manufacturing a semiconductor device, comprising the steps of:

(a) providing a substrate having a first main surface and a second main surface on the side opposite to the first main surface and forming a plurality of semiconductor elements over the first main surface of the substrate to form a semiconductor wafer;

(b) providing an annular ring to which an adhesive tape has been attached;

(c) attaching the semiconductor wafer onto the adhesive tape so that the second main surface of the semiconductor wafer faces the adhesion surface of the adhesive tape located in the ring;

(d) dicing the semiconductor wafer into a plurality of semiconductor chips to form a sawn wafer in which the plurality of semiconductor chips are retained by the ring while being attached to the adhesive tape;

(e) after the step (d), housing the sawn wafer in a shipping case having a first case portion that covers a first surface of the sawn wafer to which the semiconductor chips have been attached and a second case portion that covers a second surface of the sawn wafer on the side opposite to the first surface and thereby fixing the ring;

(f) after the step (e), housing the shipping case in a shipping bag; and

(g) after the step (f), sucking a gas from the shipping bag to reduce a pressure in the shipping case,

wherein the first case portion has, in the step (e), a first recess portion that covers the semiconductor chips and a first ventilation route communicated with the first recess portion and coupled to an external space of the shipping case;

wherein the second case portion has, in the step (e), a second recess portion that covers the second surface of the sawn wafer; and

wherein in the step (g), a gas is discharged from the shipping case via the first ventilation route.

2. The method of manufacturing a semiconductor device according to claim 1 ,

wherein the first case portion has, outside the first recess portion, a ring holding portion for pressing the first surface of the ring of the sawn wafer to fix the ring, and

wherein the first ventilation route communicates a space inside the ring with a space outside the ring in plan view.

3. The method of manufacturing a semiconductor device according to claim 1 ,

wherein the first case portion is provided so as to surround the periphery of the first recess portion and has a ring holding portion for pressing the first surface of the ring of the sawn wafer to fix the ring, and

wherein in plan view, the first ventilation route communicates a space in the first recess portion with a space outside the ring holding portion so as to penetrate through a portion of the ring holding portion.

4. The method of manufacturing a semiconductor device according to claim 1 ,

wherein the second case portion has a second ventilation route communicated with the second recess portion and coupled to an external space of the shipping case; and

wherein in the step (g), a gas is discharged from the second recess portion via the second ventilation route.

5. The method of manufacturing a semiconductor device according to claim 4 ,

wherein the first ventilation route and the second ventilation route are coupled to each other.

6. The method of manufacturing a semiconductor device according to claim 4 ,

wherein the second ventilation route includes a gap formed between an outer edge portion of the ring of the sawn wafer and a wall surface of the second recess portion.

7. The method of manufacturing a semiconductor device according to claim 4 ,

wherein a volume of a first space formed by the first recess portion and the first surface of the sawn wafer in the step (e) is larger than a volume of the second recess portion formed by the second recess portion and the second surface of the sawn wafer in the step (e).

8. The method of manufacturing a semiconductor device according to claim 7 ,

wherein the semiconductor chips each have an image sensor element formed on the side of the first main surface.

9. The method of manufacturing a semiconductor device according to claim 8 ,

wherein after the step (d) but before the step (e), a protection tape is attached onto the sawn wafer so as to cover the semiconductor chips.

10. The method of manufacturing a semiconductor device according to claim 1 , further comprising the steps of:

(h) after the step (g), opening the shipping bag to increase a pressure in the shipping case; and

(i) after the step (h), taking out the sawn wafer from the shipping case.

11. The method of manufacturing a semiconductor device according to claim 1 ,

wherein the first ventilation route that couples the external space of the shipping case to a first space in the first recess portion has therein a space at which the first ventilation route has a partially enlarged cross-sectional area.

Assignments (2)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 17, 2015
From: MATSUDA, SHINTARO
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 036125/0131 →
Priority Claims (1)
JP 2014-154312 · Jul 29, 2014 · national
Continuity (1)
Related Publication 20160035787A1 · Feb 4, 2016