IP Library › Granted Patent US 9,948,877
Granted Patent B2
US 9,948,877 · App. 14/818,560 · Granted Apr 17, 2018

Solid-state imaging apparatus and imaging system having first and second metal members arranged in different directions

Inventors: Masaaki Iwane (Sagamihara, JP); Akira Okita (Yamato, JP)
Assignee: CANON KABUSHIKI KAISHA
H04N5/37457H01L27/14609H01L27/14636H01L27/14641H04N5/378H01L27/14643
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Quick Facts
Patent No.
US 9,948,877
App. No.
14/818,560
Granted
Apr 17, 2018
Kind
B2
Abstract

Provided is a solid-state imaging apparatus, including: a first amplifier and a second amplifier; a coupling capacitor including a first electrode and a second electrode; a first metal member configured to connect an output terminal of the first amplifier and the first electrode; and a second metal member configured to connect an input terminal of the second amplifier and the second electrode, wherein, in a cross section perpendicular to a line that runs from the second electrode toward the input terminal of the second amplifier, the first metal member is arranged in at least two directions out of directions relative to the second metal member that are above, below, to the left of, and to the right of the second metal member.

Claims (46)

1. A solid-state imaging apparatus, comprising:

a first amplifier and a second amplifier;

a capacitor comprising a first electrode and a second electrode;

a first metal member, arranged over a surface of a semiconductor substrate, configured to connect an output terminal of the first amplifier and the first electrode; and

a second metal member configured to connect an input terminal of the second amplifier and the second electrode,

wherein the second electrode comprises polysilicon, and

wherein, in a cross section perpendicular to the surface of the semiconductor substrate, a first part of the first metal member and a part of the second metal member are adjacent to each other in at least a first direction, and a second part of the first metal member and the part of the second metal member are adjacent to each other in a second direction which is different from the first direction.

2. A solid-state imaging apparatus according to claim 1 , wherein the output terminal of the first amplifier comprises a source of a first source follower transistor, and the input terminal of the second amplifier comprises a gate of a second source follower transistor.

3. A solid-state imaging apparatus according to claim 1 , wherein, in the cross section, a third part of the first metal member and the part of the second metal member are adjacent to each other in a third direction which is different from the first direction and the second direction,

wherein the second direction crosses the first direction and the third direction.

4. A solid-state imaging apparatus according to claim 3 , wherein, in the cross section, a fourth part of the first metal member and the part of the second metal member are adjacent to each other in a fourth direction which is different from the first direction, the second direction, and the third direction, and

wherein the fourth direction crosses the first direction and the third direction.

5. A solid-state imaging apparatus according to claim 1 , wherein, in the cross section, the second metal member is surrounded by the first metal member and a via.

6. A solid-state imaging apparatus according to claim 1 , further comprising a plurality of pixels, each of which comprises a photoelectric conversion unit and an amplifying transistor, the photoelectric conversion unit being configured to generate an electric charge that is based on light, and the amplifying transistor being configured to output a signal that is based on the electric charge,

wherein the first amplifier comprises the amplifying transistor.

7. An imaging system, comprising:

a solid-state imaging apparatus according to claim 1 ; and

a signal processing unit configured to process a signal that is output from the solid-state image pickup apparatus.

8. A solid-state imaging apparatus according to claim 1 , wherein the first direction crosses the second direction.

9. A solid-state imaging apparatus according to claim 1 , wherein the first metal member is connected to the first amplifier through a transistor.

10. A solid-state imaging apparatus according to claim 1 , further comprising a column reading circuit configured to be input a signal from a pixel,

wherein the column reading circuit comprises the capacitor and the second amplifying circuit.

11. A solid-state imaging apparatus according to claim 1 , wherein the first electrode comprises a semiconductor region of the semiconductor substrate.

12. A solid-state imaging apparatus, comprising:

a first amplifier and a second amplifier;

a capacitor comprising a first electrode and a second electrode;

a first metal member, arranged over a surface of a semiconductor substrate, configured to connect an output terminal of the first amplifier and the first electrode; and

a second metal member, arranged over the surface of the semiconductor substrate, configured to connect an input terminal of the second amplifier and the second electrode,

wherein the second electrode comprises polysilicon, and

wherein, in a planar view, a part of the second metal member is arranged between a first part of the first metal member and a second part of the first metal member.

13. A solid-state imaging apparatus according to claim 12 , wherein the output terminal of the first amplifier comprises a source of a first source follower transistor, and the input terminal of the second amplifier comprises a gate of a second source follower transistor.

14. A solid-state imaging apparatus according to claim 12 ,

wherein, in a cross section perpendicular to the surface of the semiconductor substrate, the first part of the first metal member and the part of the second metal member are adjacent to each other in a first direction, and the second part of the first metal member and the part of the second metal member are adjacent to each other in a second direction which is opposite to the first direction,

wherein, in the cross section, a third part of the first metal member and the part of the second metal member are adjacent to each other in a third direction which is different from the first direction and the second direction, and

wherein the third direction crosses the first direction and the second direction.

15. A solid-state imaging apparatus according to claim 14 , wherein, in the cross section, a fourth part of the first metal member and the part of the second metal member are adjacent to each other in a fourth direction which is different from the first direction, the second direction, and the third direction, and is opposite to the third direction.

16. A solid-state imaging apparatus according to claim 12 , wherein, in a cross section, the part of the second metal member is surrounded by the first metal member and a via.

17. A solid-state imaging apparatus according to claim 12 , further comprising a plurality of pixels, each of which comprises a photoelectric conversion unit and an amplifying transistor, the photoelectric conversion unit being configured to generate an electric charge that is based on light, and the amplifying transistor being configured to output a signal that is based on the electric charge,

wherein the first amplifier comprises the amplifying transistor.

18. An imaging system, comprising:

a solid-state imaging apparatus according to claim 12 ; and

a signal processing unit configured to process a signal that is output from the solid-state image pickup apparatus.

19. A solid-state imaging apparatus according to claim 12 , wherein the first metal member is connected to the first amplifier through a transistor.

20. A solid-state imaging apparatus according to claim 12 , further comprising a column reading circuit configured to be input a signal from a pixel,

wherein the column reading circuit comprises the capacitor and the second amplifying circuit.

21. A solid-state imaging apparatus according to claim 12 , wherein the first electrode comprises a semiconductor region of the semiconductor substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 22, 2015
From: IWANE, MASAAKI; OKITA, AKIRA
To: CANON KABUSHIKI KAISHA
Reel/Frame 036851/0179 →
Priority Claims (1)
JP 2014-167227 · Aug 20, 2014 · national
Continuity (1)
Related Publication 20160057372A1 · Feb 25, 2016