IP Library Granted Patent US 9,660,063
Granted Patent B2
US 9,660,063 · App. 14/824,131 · Granted May 23, 2017

Semiconductor structure having sets of III-V compound layers and method of forming the same

Inventors: Chi-Ming Chen (Zhubei, TW); Po-Chun Liu (Hsinchu, TW); Chung-Yi Yu (Hsinchu, TW); Chia-Shiung Tsai (Hsinchu, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
H01L29/778H01L21/0251H01L21/0254H01L21/02458H01L21/02505H01L29/157H01L29/2003H01L29/66462H01L29/7787
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Quick Facts
Patent No.
US 9,660,063
App. No.
14/824,131
Granted
May 23, 2017
Kind
B2
Abstract

A semiconductor structure includes a substrate; and a graded III-V layer over the substrate. The semiconductor structure further includes a p-doped gallium nitride (GaN) layer over the graded III-V layer. The semiconductor structure further includes one or more sets of GaN layers over the p-doped GaN layer. Each set of the one or more sets of GaN layers includes a lower GaN layer, wherein the lower GaN layer is undoped, unintentionally doped having N-type doping, or N-type doped. Each set of the one or more sets of GaN layers includes an upper GaN layer on the lower GaN layer, wherein the upper GaN layer is P-type doped. The semiconductor structure includes a second GaN layer over the one or more sets of GaN layers, the second GaN layer being either undoped or unintentionally doped having the N-type doping. The semiconductor structure includes an active layer over the second GaN layer.

Claims (43)

1. A semiconductor structure, comprising:

a substrate;

a graded III-V layer over the substrate;

a p-doped gallium nitride (GaN) layer directly contacting the graded III-V layer;

one or more sets of GaN layers over the p-doped GaN layer, each set of the one or more sets of GaN layers comprising:

a lower GaN layer, wherein the lower GaN layer is undoped, unintentionally doped having N-type doping, or N-type doped, and

an upper GaN layer on the lower GaN layer, wherein the upper GaN layer is P-type doped;

a second GaN layer over the one or more sets of GaN layers, the second GaN layer being either undoped or unintentionally doped having the N-type doping; and

an active layer over the second GaN layer.

2. The semiconductor structure of claim 1 , further comprising a gate dielectric over the active layer.

3. The semiconductor structure of claim 1 , further comprising a nucleation layer between the substrate and the graded III-V layer.

4. The semiconductor structure of claim 1 , wherein a number of sets of the one or more sets of GaN layer ranges from 1 to 200.

5. The semiconductor structure of claim 1 , wherein a two-dimensional electron gas (2-DEG) layer is present in the second GaN layer.

6. The semiconductor structure of claim 1 , further comprising an electrode extending through the active layer to contact the second GaN layer.

7. The semiconductor structure of claim 1 , wherein the graded layer comprising a plurality of sublayers.

8. The semiconductor structure of claim 1 , wherein the graded layer comprises a single layer having a continuous concentration gradient.

9. The semiconductor structure of claim 1 , wherein the graded layer is in direct contact with the substrate.

10. A semiconductor structure, comprising:

a substrate;

a first III-V compound layer over the substrate, wherein the first III-V compound layer includes a first dopant type;

one or more sets of III-V compound layers over the first III-V layer, each set of the one or more sets of III-V compound layers comprising:

a lower III-V compound layer, wherein the lower III-V compound layer is undoped, unintentionally doped having a second dopant type, or doped having the second dopant type, and the second dopant type is opposite the first dopant type, and

an upper III-V compound layer on the lower III-V compound layer, wherein the upper III-V compound layer is doped with the first dopant type, the upper III-V compound layer includes a depletion region, and a thickness of the depletion region is less than a thickness of the upper III-V compound layer;

a second III-V compound layer over the one or more sets of III-V compound layers, the second III-V compound layer being either undoped or unintentionally doped having the second dopant type; and

an active layer over the second III-V compound layer.

11. The semiconductor structure of claim 10 , further comprising a graded layer between the substrate and the first III-V compound layer.

12. The semiconductor structure of claim 10 , further comprising an additional depletion region in the first III-V compound layer, wherein a thickness of the first III-V compound layer is greater than 0.15 microns (μm).

13. The semiconductor structure of claim 10 , further comprising a dielectric layer over the active layer.

14. A semiconductor structure, comprising:

a substrate;

a graded III-V layer over the substrate;

a first gallium nitride (GaN) layer over the graded III-V layer, wherein the first GaN layer includes a first dopant type;

one or more sets of GaN layers over the first GaN layer, each set of the one or more sets of GaN layers comprising:

a lower GaN layer, wherein the lower GaN layer has a second dopant type opposite the first dopant type, and

an upper GaN layer on the lower GaN layer, wherein the upper GaN layer has the first dopant type;

a second GaN layer over the one or more sets of GaN layers, the second GaN layer having the second dopant type; and

an active layer over the second GaN layer.

15. The semiconductor structure of claim 14 , wherein the first dopant type is a p-type dopant.

16. The semiconductor structure of claim 14 , further comprising a source/drain electrode in direct contact with the active layer and the second GaN layer.

17. The semiconductor structure of claim 14 , further comprising a gate electrode directly contacting the active layer.

18. The semiconductor structure of claim 14 , wherein each set of the one or more sets of GaN layer is reverse biased.

19. The semiconductor structure of claim 14 , wherein the lower GaN layer of each set of the one or more sets of GaN layers has a thickness ranging from about 0.05 microns (μm) to about 0.1 μm.

20. The semiconductor structure of claim 14 , wherein a dopant concentration of the lower GaN layer of each set of the one or more sets of GaN layers is different from a dopant concentration of a corresponding upper GaN layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 12, 2015
From: CHEN, CHI-MING; LIU, PO-CHUN; YU, CHUNG-YI; TSAI, CHIA-SHIUNG
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 036304/0614 →
Continuity (2)
Continuation 13743045 · Jan 16, 2013
Related Publication 20150349106A1 · Dec 3, 2015