IP Library Granted Patent US 9,705,489
Granted Patent B2
US 9,705,489 · App. 14/835,403 · Granted Jul 11, 2017

Cascode transistor circuit

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Quick Facts
Patent No.
US 9,705,489
App. No.
14/835,403
Granted
Jul 11, 2017
Kind
B2
Abstract

A cascode transistor circuit comprising a depletion-mode switch in series with a normally-off switch between a drain output terminal and a source output terminal. The circuit also includes a controller comprising a controller output terminal configured to provide a normally-on control signal for a normally-on control terminal of the depletion-mode switch, wherein the normally-on control signal is independent of the normally-off control signal; a negative voltage source configured to provide a negative voltage to the normally-on control terminal of the depletion-mode switch; and a feedback capacitance between the drain output terminal and a control node in a circuit path between the controller output terminal and the normally-on control terminal of the depletion-mode switch.

Claims (24)

1. A cascode transistor circuit comprising:

a drain output terminal;

a source output terminal;

a depletion-mode switch including a normally-on control terminal and a normally-on conduction channel;

a normally-off switch including a normally-off control terminal and a normally-off conduction channel, wherein the normally-off control terminal is configured to receive a normally-off control signal, and wherein the normally-off conduction channel is connected in series with the normally-on conduction channel between the drain output terminal and the source output terminal;

a controller including a controller output terminal configured to provide a normally-on control signal for the normally-on control terminal of the depletion-mode switch, wherein the normally-on control signal is controlled independent of the normally-off control signal;

a negative voltage source configured to provide a negative voltage to the normally-on control terminal of the depletion-mode switch, wherein the negative voltage source includes a bootstrap circuit connected between the controller output terminal and the normally-on control terminal of the depletion-mode switch; and

a feedback capacitance between the drain output terminal and a control node in a circuit path between the controller output terminal and the normally-on control terminal of the depletion-mode switch.

2. The cascode transistor circuit of claim 1 , wherein the normally-on control signal is a current signal, and the feedback capacitance is configured to control the rate of change of voltage at the drain output terminal (dV/dt) in accordance with the current of the normally-on control signal.

3. The cascode transistor circuit of claim 2 , wherein the normally-on control signal is a first fixed current signal for switching on the depletion-mode switch, and wherein the normally-on control signal is a second fixed current signal for switching off the depletion-mode switch.

4. The cascode transistor circuit of claim 1 , wherein the feedback capacitance is substantially constant over an expected voltage range across the normally-on conduction channel.

5. The cascode transistor circuit of claim 1 , wherein the feedback capacitance comprises a capacitance between the controller output terminal and the drain output terminal.

6. The cascode transistor circuit of claim 1 , wherein the feedback capacitance comprises a capacitance between the normally-on control terminal and the drain output terminal.

7. The cascode transistor circuit of claim 6 , wherein the capacitance comprises a component that is independent of the depletion-mode switch.

8. The cascode transistor circuit of claim 7 , wherein the capacitance is a discrete component.

9. The cascode transistor circuit of claim 6 , wherein the capacitance comprises a parasitic capacitance of the depletion-mode switch.

10. The cascode transistor circuit of claim 1 , wherein the bootstrap circuit comprises a bootstrap capacitor and a bootstrap rectifier, wherein:

the bootstrap capacitor is connected in series between the controller output terminal and the normally-on control terminal of the depletion-mode switch; and

the bootstrap rectifier is connected in series between the normally-on control terminal of the depletion-mode switch and the source output terminal.

11. The cascode transistor circuit of claim 10 , further comprising a charge pump capacitance in parallel with the bootstrap capacitor, wherein the charge pump capacitance is configured to maintain a negative voltage across the bootstrap capacitor when the cascode transistor circuit is off.

12. The cascode transistor circuit of claim 1 , wherein the normally-off control signal is configured to control the normally-off switch such that it is turned on during normal operation.

13. The cascode transistor circuit of claim 1 , further comprising an under-voltage lockout (UVLO) circuit configured to provide the normally-off control signal such that the normally-off control signal is arranged to turn the normally-off switch off before and during start-up, and optionally during any fault condition, and turn the normally-off switch on after one or more voltages within the cascode transistor circuit satisfy one or more associated threshold values.

14. The cascode transistor circuit of claim 1 , wherein the depletion-mode switch is provided on a first die, and the normally-off switch is provided on a second, different, die.

15. The cascode transistor circuit of claim 14 , wherein the controller is also provided on the second die.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Feb 13, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 048328/0964 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 8, 2016
From: NXP B.V.
To: NEXPERIA B.V.
Reel/Frame 039610/0734 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 25, 2015
From: VAN OTTEN, RALF; SCHOOFS, FRANCISCUS; ROSE, MATTHIAS; BERGVELD, HENDRIK
To: NXP B.V.
Reel/Frame 036417/0912 →