Method for rejecting tuning disturbances to improve lamp failure prediction quality in thermal processes
Embodiments disclosed herein include methods for reducing or eliminating the impact of tuning disturbances during prediction of lamp failure. In one embodiment, the method comprises monitoring data of a lamp module for a process chamber using one or more physical sensors disposed at different locations within the lamp module, creating virtual sensors based on monitoring data of the lamp module, and providing a prediction model for the lamp module using the virtual sensors as inputs.
1. A method for lamp failure prediction, comprising:
creating virtual sensors by collecting data comprising current and resistance related to an upper lamp and a lower lamp of a lamp module disposed in a semiconductor process chamber, wherein the virtual sensors are represented as equations selected from one or more of the following:
first
virtual
sensor
=
log
(
abs
(
TII
k
1
*
TIR
)
+
1
)
,
second
virtual
sensor
=
log
(
abs
(
TOI
k
2
*
TOR
)
+
1
)
,
third
virtual
sensor
=
log
(
abs
(
BII
k
3
*
BIR
)
+
1
)
,
fourth
virtual
sensor
=
log
(
abs
(
BOI
k
4
*
BOR
)
+
1
)
,
and
fifth
virtual
sensor
=
log
(
abs
(
TII
k
1
*
TIR
+
TOI
k
2
*
TOR
+
BII
k
3
*
BIR
+
BOI
k
4
*
BOR
)
+
1
)
,
wherein TII is “Top Inner Current,” BII is “Bottom Inner Current,” TOI is “Top Outer Current,” BOI is “Bottom Outer Current,” TIR is “Top Inner Resistance,” BIR is “Bottom Inner Resistance,” TOR is “Top Outer Resistance,” BOR is “Bottom Outer Resistance,” and the expression “log” in equations is natural logarithm, and where factors k1, k2, k3, k4 are constants extracted from the data;
providing a lamp failure prediction for the lamp module using the virtual sensors as inputs; and
performing maintenance on the lamp module based on the lamp failure prediction to increase uptime and reduce unscheduled downtime.
2. The method of claim 1 , wherein the upper lamp is disposed relatively above an upper quartz window of the process chamber and the lower lamp is disposed relatively below a lower quartz portion of the process chamber.
3. A method, comprising:
collecting data of a lamp module disposed in a semiconductor process chamber from one or more physical sensors disposed at different locations within the lamp module;
creating virtual sensors based on the data of the lamp module, wherein the virtual sensors are represented as equations selected from one or more of the following:
first
virtual
sensor
=
log
(
abs
(
TII
k
1
*
TIR
)
+
1
)
,
second
virtual
sensor
=
log
(
abs
(
TOI
k
2
*
TOR
)
+
1
)
,
third
virtual
sensor
=
log
(
abs
(
BII
k
3
*
BIR
)
+
1
)
,
fourth
virtual
sensor
=
log
(
abs
(
BOI
k
4
*
BOR
)
+
1
)
,
and
fifth
virtual
sensor
=
log
(
abs
(
TII
k
1
*
TIR
+
TOI
k
2
*
TOR
+
BII
k
3
*
BIR
+
BOI
k
4
*
BOR
)
+
1
)
,
wherein TII is “Top Inner Current,” BII is “Bottom Inner Current,” TOI is “Top Outer Current,” BOI is “Bottom Outer Current,” TIR is “Top Inner Resistance,” BIR is “Bottom Inner Resistance,” TOR is “Top Outer Resistance,” BOR is “Bottom Outer Resistance,” and the expression “log” in equations is natural logarithm, and where factors k1, k2, k3, k4 are constants extracted from the data;
providing a prediction model for the lamp module using the virtual sensors as inputs; and
performing maintenance on the lamp module based on the prediction model to increase uptime and reduce unscheduled downtime.
4. The method of claim 3 , wherein the data comprises current and resistance related to an upper lamp module and/or a lower lamp module.
5. The method of claim 3 , wherein the data comprises a current drawn at a given resistance of the lamp module.
6. The method of claim 3 , wherein monitoring data of the lamp module uses one or more of selected features associated with the one or more physical sensors.
7. The method of claim 6 , wherein the selected features comprises top inner current, bottom inner current, top outer current, bottom outer current, top inner resistance, bottom inner resistance, top outer resistance, and bottom outer resistance.
8. The method of claim 3 , wherein the lamp module comprises an upper lamp module disposed relatively above an upper quartz window of the process chamber and/or a lower lamp module disposed relatively below a lower quartz portion of the process chamber.
9. The method of claim 8 , wherein the lamp module comprises a number of lamps in multiples of four.