IP Library Granted Patent US 9,564,492
Granted Patent B2
US 9,564,492 · App. 14/844,283 · Granted Feb 7, 2017

Group III-V device with a selectively modified impurity concentration

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Quick Facts
Patent No.
US 9,564,492
App. No.
14/844,283
Granted
Feb 7, 2017
Kind
B2
Abstract

There are disclosed herein various implementations of a semiconductor structure and method. The semiconductor structure comprises a substrate, a transition body over the substrate, and a group III-V intermediate body having a bottom surface over the transition body. The semiconductor structure also includes a group III-V device layer over a top surface of the group III-V intermediate body. The group III-V intermediate body has a continuously reduced impurity concentration wherein a higher impurity concentration at the bottom surface is continuously reduced to a lower impurity concentration at the top surface.

Claims (14)

1. A semiconductor structure comprising:

a substrate;

a transition body having a bottom surface over said substrate;

a group III-V intermediate body having a bottom surface over a top surface of said transition body;

a group III-V device layer over a top surface of said group III-V intermediate body;

wherein a transition body impurity concentration at a depth position between said bottom surface of said transition body and said top surface of said transition body is greater than said transition body impurity concentration at said bottom surface of said transition body;

wherein a selectively modified impurity concentration in said group III-V intermediate body falls within said group III-V intermediate body such that a higher impurity concentration at said bottom surface of said group III-V intermediate body is reduced to a substantially lower impurity concentration at said top surface of said group III-V intermediate body;

wherein said selectively modified impurity concentration remains substantially flat within said group III-V device layer.

2. The semiconductor structure of claim 1 , wherein said transition body impurity concentration falls between said bottom surface of said transition body and said top surface of said transition body.

3. The semiconductor structure of claim 1 , wherein an impurity producing said higher and lower impurity concentrations is a P type impurity.

4. The semiconductor structure of claim 1 , wherein said selectively modified impurity concentration comprises a selectively modified carbon concentration.

5. The semiconductor structure of claim 1 , wherein said selectively modified impurity concentration includes a plurality of impurity species.

6. The semiconductor structure of claim 1 , wherein said group III-V intermediate body comprises a compositionally graded III-Nitride body having a first III-Nitride composition at said bottom surface and a second III-Nitride composition above said bottom surface.

7. The semiconductor structure of claim 1 , wherein said group III-V device layer includes at least one of a III-Nitride field-effect transistor (FET) and a III-Nitride high electron mobility transistor (HEMT).

Assignments (3)
MERGER AND CHANGE OF NAME Recorded Apr 13, 2016
From: INFINEON TECHNOLOGIES NORTH AMERICA CORP.; INTERNATIONAL RECTIFIER CORPORATION; INTERNATIONAL RECTIFIER CORPORATION
To: INFINEON TECHNOLOGIES AMERICAS CORP.
Reel/Frame 038463/0859 →
MERGER AND CHANGE OF NAME Recorded Mar 30, 2016
From: INTERNATIONAL RECTIFIER CORPORATION; INFINEON TECHNOLOGIES AMERICAS CORP.
To: INFINEON TECHNOLOGIES AMERICAS CORP.
Reel/Frame 038141/0097 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2015
From: BRIERE, MICHAEL A.
To: INTERNATIONAL RECTIFIER CORPORATION
Reel/Frame 036487/0089 →