IP Library Granted Patent US 10,192,753
Granted Patent B2
US 10,192,753 · App. 14/844,382 · Granted Jan 29, 2019

Nonvolatile semiconductor memory device and method of manufacturing the same

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Quick Facts
Patent No.
US 10,192,753
App. No.
14/844,382
Granted
Jan 29, 2019
Kind
B2
Abstract

According to an embodiment, a nonvolatile semiconductor memory device comprises a plurality of conductive layers that are stacked in plurality in a first direction via an inter-layer insulating layer, that extend in a second direction which intersects the first direction, and that are disposed in plurality in a third direction which intersects the first direction and the second direction. In addition, the same nonvolatile semiconductor memory device comprises: a semiconductor layer that has the first direction as a longitudinal direction; a tunnel insulating layer that contacts a side surface of the semiconductor layer; a charge accumulation layer that contacts a side surface of the tunnel insulating layer; and a block insulating layer that contacts a side surface of the charge accumulation layer. Furthermore, in the same nonvolatile semiconductor memory device, an end in the third direction of the plurality of conductive layers is rounded.

Claims (35)

1. A nonvolatile semiconductor memory device, comprising:

a plurality of conductive layers arranged in a first direction and a second direction crossing the first direction, the plurality of conductive layers extending in a third direction, the third direction crossing the first direction and the second direction, the plurality of conductive layers including a first conductive layer and a second conductive layer, the first conductive layer and the second conductive layer being arranged in the second direction;

a first semiconductor layer having the first direction as a longitudinal direction and facing the first conductive layer;

a first charge accumulation layer disposed between the first semiconductor layer and the first conductive layer;

a second semiconductor layer having the first direction as a longitudinal direction and facing the second conductive layer; and

a second charge accumulation layer disposed between the second semiconductor layer and the second conductive layer, wherein

at least a part of the first conductive layer is disposed between the first semiconductor layer and the second semiconductor layer,

at least a part of the second conductive layer is disposed between the first conductive layer and the second semiconductor layer, and

the first conductive layer having a first surface in the second direction facing the first semiconductor layer and a second surface in the second direction facing the second conductive layer, the second surface being rounded.

2. The nonvolatile semiconductor memory device according to claim 1 , wherein a rounded portion of the first conductive layer has a width of 1 nm or more in the first direction.

3. The nonvolatile semiconductor memory device according to claim 1 , wherein a rounded portion of the first conductive layer has a curvature.

4. The nonvolatile semiconductor memory device according to claim 3 , wherein a radius of curvature of the rounded portion of the first conductive layer is 20 nm or more.

5. The nonvolatile semiconductor memory device according to claim 1 , further comprising an oxide portion that contacts the second surface of the first conductive layer.

6. The nonvolatile semiconductor memory device according to claim 1 , wherein the first conductive layer farther includes a silicide portion, the silicide portion has the second surface of the first conductive layer.

7. The nonvolatile semiconductor memory device according to claim 6 , further comprising an oxide-silicide portion that contacts the second surface of the first conductive layer.

8. The nonvolatile semiconductor memory device according to claim 1 , further comprising:

an insulating layer extending in the first direction and the second direction, disposed between the first conductive layer and the second conductive layer and electrically insulating between the first conductive layer and the second conductive layer, wherein

the insulating layer contacts the second surface.

9. The nonvolatile semiconductor memory device according to claim 1 , wherein the second surface is rounded more than the first surface.

10. A nonvolatile semiconductor memory device, comprising:

a plurality of conductive layers arranged in a first direction and a second direction crossing the first direction, the plurality of conductive layers extending in a third direction, the third direction crossing the first direction and the second direction, the plurality of conductive layers including a first conductive layer and a second conductive layer, the first conductive layer and the second conductive layer being arranged in the second direction;

a first semiconductor layer having the first direction as a longitudinal direction and facing the first conductive layer;

a first charge accumulation layer disposed between the first semiconductor layer and the first conductive layer; and

a second semiconductor layer having the first direction as a longitudinal direction and facing the second conductive layer; and

a second charge accumulation layer disposed between the second semiconductor layer and the second conductive layer, wherein

at least a part of the first conductive layer is disposed between the first semiconductor layer and the second semiconductor layer,

at least a part of the second conductive layer is disposed between the first conductive layer and the second semiconductor layer, and

the first conductive layer having a first surface in the second direction facing the first semiconductor layer and a second surface in the second direction facing the second conductive layer, an upper end and a lower end of the second surface being rounded.

11. The nonvolatile semiconductor memory device according to claim 10 , wherein a rounded portion of the first conductive layer has a width of 1 nm or more in the first direction.

12. The nonvolatile semiconductor memory device according to claim 10 , wherein a rounded portion of the first conductive layer has a curvature.

13. The nonvolatile semiconductor memory device according to claim 12 , wherein a radius of curvature of the rounded portion of the first conductive layer is 20 nm or more.

14. The nonvolatile semiconductor memory device according to claim 10 , further comprising an oxide portion that contacts the second surface of the first conductive layer.

15. The nonvolatile semiconductor memory device according to claim 10 , wherein the first conductive layer further includes a silicide portion, the silicide portion has the second surface of the first conductive layer.

16. The nonvolatile semiconductor memory device according to claim 15 , further comprising an oxide-silicide portion that contacts the second surface of the first conductive layer.

17. The nonvolatile semiconductor memory device according to claim 10 , wherein the second surface is rounded more than an upper end and a lower end of the first surface.

Assignments (5)
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 14, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043541/0381 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 8, 2015
From: SONEHARA, TAKESHI; HIRAI, TAKAHIRO; HIGUCHI, MASAAKI; SHIMIZU, TAKASHI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 037232/0779 →