IP Library Granted Patent US 10,031,887
Granted Patent B2
US 10,031,887 · App. 14/844,876 · Granted Jul 24, 2018

Systems and methods for improving the performance of a quantum processor via reduced readouts

Inventor: Jack Raymond (Vancouver, CA)
Assignee: D-WAVE SYSTEMS INC.
G06F15/76G06N99/002
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Quick Facts
Patent No.
US 10,031,887
App. No.
14/844,876
Granted
Jul 24, 2018
Kind
B2
Abstract

Techniques for improving the performance of a quantum processor are described. The techniques include reading out a fraction of the qubits in a quantum processor and utilizing one or more post-processing operations to reconstruct qubits of the quantum processor that are not read. The reconstructed qubits may be determined using a perfect sampler to provide results that are strictly better than reading all of the qubits directly from the quantum processor. The composite sample that includes read qubits and reconstructed qubits may be obtained faster than if all qubits of the quantum processor are read directly.

Claims (29)

1. A method of operation in a problem solving system that comprises both a quantum processor and at least one processor-based device communicatively coupled to one another to at least approximately minimize an objective function, the quantum processor comprising a plurality of qubits including a first set of qubits and a second set of qubits, and a plurality of coupling devices, wherein each coupling device provides controllable communicative coupling between two of the plurality of qubits, the method comprising:

operating the quantum processor as a sample generator to provide samples from a probability distribution, wherein a shape of the probability distribution depends on a configuration of a number of programmable parameters for the quantum processor and a number of low-energy states of the quantum processor respectively correspond to a number of high probability samples of the probability distribution, and wherein operating the quantum processor as a sample generator comprises:

defining a configuration of the number of programmable parameters for the quantum processor via the at least one processor-based device, wherein the configuration of the number of programmable parameters corresponds to a probability distribution over the plurality of qubits of the quantum processor;

programming the quantum processor with the configuration of the number of programmable parameters via a programming subsystem;

evolving the quantum processor via an evolution subsystem; and

reading out states for the qubits in the first set of qubits of the quantum processor via a readout subsystem, wherein the states for the qubits in the first set of qubits of the quantum processor correspond to samples from the probability distribution;

processing the samples read via the readout system via the at least one processor-based device, wherein processing the samples read via the readout system via the at least one processor-based device comprises:

determining respective states for the qubits in the second set of qubits based on samples read via the readout system via the at least one processor-based device, wherein determining respective states for the qubits in the second set of qubits based on samples read via the readout system via the at least one processor-based device comprises:

sampling the states for the qubits in the second set of qubits conditioned on the states for the qubits that represent the first set of qubits read via the readout system.

2. The method of claim 1 wherein the plurality of qubits includes a third set of qubits and a fourth set of qubits, the method further comprising:

operating the quantum processor as a sample generator to provide samples from a probability distribution, wherein a shape of the probability distribution depends on a configuration of a number of programmable parameters for the quantum processor and a number of low-energy states of the quantum processor respectively correspond to a number of high probability samples of the probability distribution, and wherein operating the quantum processor as a sample generator comprises:

defining a configuration of the number of programmable parameters for the quantum processor via the at least one processor-based device, wherein the configuration of the number of programmable parameters corresponds to a probability distribution over the plurality of qubits of the quantum processor;

programming the quantum processor with the configuration of the number of programmable parameters via a programming subsystem;

evolving the quantum processor via an evolution subsystem; and

reading out states for the qubits in the third set of qubits of the quantum processor via a readout subsystem, wherein the states for the qubits in the third set of qubits of the quantum processor correspond to samples from the probability distribution;

processing the samples read via the readout system via the at least one processor-based device, wherein processing the samples read via the readout system via the at least one processor-based device comprises:

determining respective states for the qubits in the fourth set of qubits based on samples read via the readout system via the at least one processor-based device.

3. The method of claim 1 wherein processing the samples read via the readout system via the at least one processor-based device comprises processing the samples read via the readout system via at least one of a microprocessor, a digital signal processor (DSP), a graphical processing unit (GPU), or a field programmable gate array (FPGA).

4. The method of claim 1 wherein determining respective states for the qubits in the second set of qubits based on samples read via the readout system via the at least one processor-based device comprises executing at least one of: an optimization operation, an enumeration, a sampling operation or evaluation of estimators.

5. The method of claim 1 wherein determining respective states for the qubits in the second set of qubits based on samples read via the readout system via the at least one processor-based device comprises executing at least one of: a local gradient descent procedure or a Gibbs sampling procedure.

6. The method of claim 1 , further comprising:

selectively modifying the first set of qubits and the second set of qubits to change which ones of the qubits of the quantum processor constitute the first set of qubits and which ones of the qubits of the quantum processor constitute the second set of qubits.

7. The method of claim 1 wherein determining respective states for the qubits in the second set of qubits based on samples read via the readout system via the at least one processor-based device includes performing a classical heuristic optimization algorithm to determine states for the qubits in the second set of qubits based on samples read via the readout system via the at least one processor-based device.

8. The method of claim 7 wherein performing a classical heuristic optimization algorithm to determine states for the qubits in the second set of qubits based on samples read via the readout system via the at least one processor-based device includes performing at least one of: a majority voting on chains of qubits post-processing operation, a local search to find a local minima post-processing operation, or a Markov Chain Monte Carlo simulation at a fixed temperature post-processing operation.

9. The method of claim 1 wherein evolving the quantum processor via an evolution subsystem includes performing at least one of adiabatic quantum computation or quantum annealing.

10. The method of claim 1 wherein operating the quantum processor as a sample generator comprises:

reading out states for the qubits in the second set of qubits of the quantum processor via the readout subsystem, wherein the states for the qubits in the first set of qubits of the quantum processor correspond to samples from the probability distribution;

wherein processing the samples read via the readout system via the at least one processor-based device comprises:

determining respective states for the qubits in the first set of qubits based on the samples read via the readout system via the at least one processor-based device.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2025
From: PSPIB UNITAS INVESTMENTS II INC.
To: D-WAVE SYSTEMS INC.; 1372934 B.C. LTD.
Reel/Frame 070470/0098 →
INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Apr 14, 2023
From: D-WAVE SYSTEMS INC.; 1372934 B.C. LTD.
To: PSPIB UNITAS INVESTMENTS II INC., AS COLLATERAL AGENT
Reel/Frame 063340/0888 →
RELEASE OF SECURITY INTEREST Recorded Sep 20, 2022
From: PSPIB UNITAS INVESTMENTS II INC., IN ITS CAPACITY AS COLLATERAL AGENT
To: D-WAVE SYSTEMS INC.
Reel/Frame 061493/0694 →
SECURITY INTEREST Recorded Mar 3, 2022
From: D-WAVE SYSTEMS INC.
To: PSPIB UNITAS INVESTMENTS II INC.
Reel/Frame 059317/0871 →
SECURITY INTEREST Recorded Nov 29, 2019
From: D-WAVE SYSTEMS INC.
To: BDC CAPITAL INC.
Reel/Frame 051144/0499 →
SECURITY INTEREST Recorded Mar 22, 2019
From: D-WAVE SYSTEMS INC.
To: BDC CAPITAL INC.
Reel/Frame 048674/0188 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2015
From: RAYMOND, JACK
To: D-WAVE SYSTEMS INC.
Reel/Frame 036491/0024 →
Continuity (2)
Provisional Application 62048043 · Sep 9, 2014
Related Publication 20160071021A1 · Mar 10, 2016
Cited By (7)
US 12,186,585 US 12,353,958 US 12,373,719 US 12,475,394 US 12,596,947 US 12,694,323 US 12,718,975