IP Library Granted Patent US 9,563,554
Granted Patent B2
US 9,563,554 · App. 14/848,159 · Granted Feb 7, 2017

Persistent content in nonvolatile memory

Inventors: Jared E. Hulbert (Shingle Springs, CA); John C. Rudelic (Folsom, CA); Hongyu Wang (Shanghai, CN)
Assignee: Micron Technology, Inc.
G06F12/0246G06F9/5016G06F12/0888G06F2212/1044G06F2212/2022G06F2212/604G06F2212/7202G11C11/5621G11C13/0004G11C15/046G11C16/0408G11C2211/5641
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Quick Facts
Patent No.
US 9,563,554
App. No.
14/848,159
Granted
Feb 7, 2017
Kind
B2
Abstract

Applications may request persistent storage in nonvolatile memory. The persistent storage is maintained across power events and application instantiations. Persistent storage may be maintained by systems with or without memory management units.

Claims (34)

1. An apparatus comprising:

a memory management component having an application programming interface (API) that includes a nonvolatile memory allocation routine configured to allocate a portion of a nonvolatile memory as persistent storage across instantiations of an application in accordance with a persistence qualifier that is provided to the nonvolatile memory allocation routine,

wherein the persistence qualifier is indicative of a type of persistence desired by the application.

2. The apparatus of claim 1 , wherein the memory allocation routine includes at least one option to maintain the persistent storage in both the nonvolatile memory and a volatile memory.

3. The apparatus of claim 1 , wherein the nonvolatile memory allocation routine maintains a data structure configured to associate persistent storage to the application.

4. The apparatus of claim 1 , wherein the nonvolatile memory allocation routine maintains a data structure configured to associate persistent storage to all instantiations of the application.

5. The apparatus of claim 1 , wherein the memory allocation routine is substantially of the form ptr=nvmalloc(size, key), wherein nvmalloc is a nonvolatile memory allocation, size is a requested size, key is unique to the application, and ptr is a reference returned to the application.

6. The apparatus of claim 1 , wherein the memory allocation routine is substantially of the form ptr=nvmalloc(size, key, the persistence qualifier), wherein nvmalloc is a nonvolatile memory allocation, size is a requested size, key is unique to the application, the persistence qualifier is an option to guide the memory management component when maintaining the persistent storage in at least one of the nonvolatile memory or a volatile memory, and ptr is a reference returned to the application.

7. The apparatus of claim 1 , further comprising:

a processor;

the nonvolatile memory, wherein the nonvolatile memory is accessible to the processor; and

a volatile memory accessible to the processor.

8. The apparatus of claim 7 , wherein the nonvolatile memory comprises phase change memory.

9. The apparatus of claim 7 , wherein the nonvolatile memory comprises FLASH memory.

10. A method comprising:

receiving a request from an application for nonvolatile memory allocation in a nonvolatile memory, the request including a persistence qualifier indicative of a type of persistence desired by the application;

determining if the application is associated with previously allocated nonvolatile memory;

if the application is associated with previously allocated nonvolatile memory, returning a reference to the previously allocated nonvolatile memory; and

if the application is not associated with previously allocated nonvolatile memory, allocating, using a nonvolatile memory allocation routine, the nonvolatile memory according to the request and the persistence qualifier.

11. The method of claim 10 , further comprising:

managing reads and writes of the nonvolatile memory in accordance with the persistence qualifier.

12. The method of claim 11 , wherein the persistence qualifier specifies whether writes to the nonvolatile memory can be cached in a volatile memory.

13. The method of claim 11 , wherein the persistence qualifier specifies whether reads from the nonvolatile memory can be cached in a volatile memory.

14. The method of claim 10 , wherein the nonvolatile memory comprises the previously allocated nonvolatile memory.

15. The method of claim 10 , further comprising migrating page tables to the nonvolatile memory responsive, at least in part, to the application becoming dormant.

16. The method of claim 15 , wherein the page tables reference persistent storage in the nonvolatile memory.

17. The method of claim 15 , further comprising executing an application while the page tables are in nonvolatile memory.

18. A non-transitory computer-readable medium having instructions encoded thereon that when accessed result in the machine performing:

receiving a request from an application for nonvolatile memory allocation in a nonvolatile memory, the request including a persistence qualifier indicative of a type of persistence desired by the application;

determining if the application is associated with previously allocated nonvolatile memory;

if the application is associated with previously allocated nonvolatile memory, returning a reference to the previously allocated nonvolatile memory; and

if the application is not associated with previously allocated nonvolatile memory, allocating, using a nonvolatile memory allocation routine, nonvolatile memory according to the request and the persistence qualifier.

19. The non-transitory computer-readable medium of claim 18 , wherein the persistence qualifier specifies whether a write to nonvolatile memory can be cached in a volatile memory.

20. The non-transitory computer-readable medium of claim 18 , wherein the persistence qualifier specifies whether a read from the nonvolatile memory can be cached in a volatile memory.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
Continuity (2)
Continuation 12638950 · Dec 15, 2009
Related Publication 20150378889A1 · Dec 31, 2015