Semiconductor memory device
View Patent ↗Three directions intersecting each other are referred to as first to third directions. A semiconductor memory device according to embodiments includes a semiconductor substrate having a top surface spread in the first and second directions, and a plurality of conductive layers laminated at predetermined intervals in the third direction on the semiconductor substrate. The semiconductor memory device further includes a columnar semiconductor layer having an interface that is in contact with the semiconductor substrate on a side surface. The columnar semiconductor layer is opposed to the plurality of conductive layers. The columnar semiconductor layer has the third direction as a lengthwise direction. The interface exists in a position deeper than the top surface of the semiconductor substrate in the third direction.
1. A semiconductor memory device, three directions intersecting each other being referred to as first to third directions, the semiconductor memory device comprising:
a semiconductor substrate having a top surface spread in the first and second directions;
a plurality of conductive layers laminated at predetermined intervals in the third direction on the semiconductor substrate; and
a semiconductor layer having a columnar shape, and having an interface that is in contact with the semiconductor substrate on a side surface, the semiconductor layer being opposed to the plurality of conductive layers, the semiconductor layer having the third direction as a lengthwise direction,
the interface existing in a position deeper than the top surface of the semiconductor substrate in the third direction,
an average crystal grain diameter in a first portion of the semiconductor layer located near the interface being larger than that in other portions in the semiconductor layer.
2. The semiconductor memory device according to claim 1 , comprising:
a tunnel insulation layer and a charge storage layer disposed from the semiconductor layer to the conductive layers; and
an insulation layer disposed in contact with the tunnel insulation layer and the charge storage layer and disposed between the semiconductor layer and the charge storage layer.
3. The semiconductor memory device according to claim 2 , wherein the insulation layer is disposed in a place obtained by recessing end portions of the tunnel insulation layer and the charge storage layer.
4. The semiconductor memory device according to claim 1 , wherein the semiconductor substrate includes a channel region where an impurity concentration is in a range of 5×10 15 cm −3 to 1×10 14 cm −3 .
5. The semiconductor memory device according to claim 1 , wherein
the semiconductor layer includes a first semiconductor film and a second semiconductor film,
the first semiconductor film is disposed to extend in the third direction and disposed between the second semiconductor film and the conductive layers, and
the second semiconductor film is disposed to extend in the third direction and the second semiconductor film has the interface.
6. The semiconductor memory device according to claim 5 , wherein
the semiconductor layer includes the first portion of the second semiconductor film located near the interface, and
an average crystal grain diameter in the first portion is greater than that in other portions in the first semiconductor film and the second semiconductor film.