Organic light-emitting diode display with gate pulse modulation
Display driver circuitry may load data into an array of pixels via data lines. The display driver circuitry may supply control signals including scan signals to the pixels via control lines. Each pixel may have transistors and capacitor circuitry for controlling the emission of light from a light-emitting diode. A drive transistor may be coupled in series with the light-emitting diode to control the amount of current flowing through the light-emitting diode. The drive transistor may have a drive transistor gate terminal that is coupled to one of the source-drain terminals of a switching transistor. The switching transistor may have a switching transistor gate terminal that receives the scan signal. When transitioning prior to an emission phase of operation, the scan signal may have a two-step transition profile or other shape that enhances display performance by reducing dynamic effects in the switching transistor.
1. A display, comprising:
a pixel array having rows and columns of pixels each having a light-emitting diode and a drive transistor coupled in series with the light-emitting diode, wherein the drive transistor has a drive transistor gate terminal;
display driver circuitry that conveys data to the pixels via data lines and that supplies control signals to the pixels via control lines, wherein the control signals include a scan signal with a multistep transition profile; and
a switching transistor in each pixel having a source-drain terminal coupled to the drive transistor gate terminal and having a switching transistor gate terminal that receives the scan signal with the multistep transition profile, wherein the multistep transition profile is characterized by a first portion in which the scan signal has a first slope and a first duration and a second portion in which the scan signal has a second slope and a second duration, and wherein, during the first portion, the scan signal falls below a voltage level that is equal to the sum of a voltage at the drive transistor gate terminal and a threshold voltage of the switching transistor.
2. The display defined in claim 1 wherein the display driver circuitry supplies the control signals to each of the pixels during a pre-emission phase in which the light-emitting diode of the pixel does not emit light and during an emission phase in which the light-emitting diode of the pixel emits light and wherein the scan signal has the multistep transition profile during a transition from a first voltage to a second voltage when transitioning between the pre-emission phase and the emission phase.
3. The display defined in claim 2 wherein the first slope is shallower than the second slope.
4. The display defined in claim 3 wherein the first duration is greater than 1 microsecond.
5. The display defined in claim 4 wherein the first duration is greater than 2 microseconds.
6. The display defined in claim 5 wherein the first duration is 2-7 microseconds.
7. The display defined in claim 6 wherein the second duration is less than 2 microseconds.
8. The display defined in claim 7 wherein each pixel has four transistors including the switching transistor and the drive transistor.
9. The display defined in claim 8 wherein each pixel has two capacitors.
10. The display defined in claim 7 wherein each pixel has six transistors including the switching transistor and the drive transistor.
11. The display defined in claim 10 wherein each pixel has one capacitor.
12. The display defined in claim 7 wherein each pixel has seven transistors including the switching transistor and the drive transistor.
13. The display defined in claim 12 wherein each pixel has one capacitor.
14. The display defined in claim 7 wherein the switching transistor and the drive transistor are p-type transistors.
15. The display defined in claim 7 wherein the switching transistor and the drive transistor are n-type transistors.
16. A display, comprising:
a pixel array having rows and columns of pixels each having a light-emitting diode and a drive transistor coupled in series with the light-emitting diode, wherein the drive transistor has a drive transistor gate terminal;
display driver circuitry that conveys data to the pixels via data lines and that supplies control signals to the pixels via control lines, wherein the control signals include a scan signal; and
a switching transistor in each pixel having a source-drain terminal coupled to the drive transistor gate terminal and having a switching transistor gate terminal that receives the scan signal, wherein the display driver circuitry supplies the scan signal to each of the pixels during a pre-emission phase in which the light-emitting diode of the pixel does not emit light and during an emission phase in which the light-emitting diode of the pixel emits light and wherein the scan signal has a fall time or rise time of 2-7 microseconds when transitioning between the pre-emission phase and the emission phase.
17. The display defined in claim 16 wherein each pixel has at least four transistors including the switching transistor and the drive transistor.
18. The display defined in claim 17 wherein each pixel has at least one capacitor.
19. The display defined in claim 16 wherein each pixel has at least six transistors.
20. The display defined in claim 19 wherein each pixel has at least two capacitors.
21. The display defined in claim 16 wherein each pixel has at least seven transistors.
22. A display, comprising:
a pixel array having rows and columns of pixels each having a light-emitting diode and a drive transistor coupled in series with the light-emitting diode, wherein the drive transistor has a drive transistor gate terminal;
display driver circuitry that conveys data to the pixels via data lines and that supplies control signals to the pixels via control lines, wherein the control signals include a scan signal; and
a switching transistor in each pixel having a source-drain terminal coupled to the drive transistor gate terminal and having a switching transistor gate terminal that receives the scan signal, wherein the scan signal has a first slope for a first period and second slope that is steeper than the first slope for a second period following the first period when transitioning between a first voltage and a second voltage prior to entering an emission phase in which the light-emitting diode of that pixel emits light, and wherein the switching transistor switches during the first period.
23. The display defined in claim 22 wherein the first period and the second period are collectively 2-7 microseconds in duration.