IP Library › Granted Patent US 9,736,408
Granted Patent B2
US 9,736,408 · App. 14/850,582 · Granted Aug 15, 2017

Ramp signal generator and CMOS image sensor using the same

Inventor: Jin-Seon Kim (Gyeonggi-do, KR)
Assignee: SK Hynix Inc.
H04N5/363H04N5/3575H04N5/374H04N5/378
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,736,408
App. No.
14/850,582
Granted
Aug 15, 2017
Kind
B2
Abstract

A ramp signal generator and a CMOS image sensor using the same are disclosed. The ramp signal generator includes a reference voltage generation unit that generates a reference voltage, a gain adjustment unit that adjusts a gain in cooperation with the reference voltage generation unit, a ramp bias voltage sampling unit that samples a ramp bias voltage of the gain adjustment unit, and a ramp signal generation unit that generates a ramp signal according to the ramp bias voltage sampled in the ramp bias voltage sampling unit.

Claims (19)

1. A ramp signal generator comprising:

a reference voltage generation unit generating a reference voltage;

a gain adjustment unit adjusting a gain based on the reference voltage, and generating a ramp bias voltage based on the adjusted gain;

a ramp bias voltage sampling unit including a sampling switch that switches the ramp bias voltage according to a control signal and a sampling capacitor that samples the ramp bias voltage; and

a ramp signal generation unit generating a ramp signal according to the ramp bias voltage sampled by the ramp bias voltage sampling unit.

2. The ramp signal generator of claim 1 , wherein the ramp bias voltage sampling unit samples the ramp bias voltage by adjusting a ramp bias sampling time according to the control signal.

3. The ramp signal generator of claim 1 , wherein the ramp bias voltage sampling unit samples the ramp bias voltage during both of a comparator reset period and a ramping period.

4. The ramp signal generator of claim 1 , wherein the ramp bias voltage sampling unit samples the ramp bias voltage during a ramping period.

5. A CMOS image sensor comprising:

a pixel array generating a pixel signal corresponding to incident light;

a ramp signal generator generating a ramp signal that is obtained by sampling a ramp bias voltage by adjusting a ramp bias sampling time; and

a read-out circuit unit reading out the pixel signal of the pixel array according to the ramp signal to generate pixel data

wherein the ramp signal generator comprises:

a reference voltage generation unit generating a reference voltage;

a gain adjustment unit adjusting a gain based on the reference voltage, and generating the ramp bias voltage based on the adjusted gain;

a ramp bias voltage sampling unit including a sampling switch that switches the ramp bias voltage according to a control signal and a sampling capacitor that samples the ramp bias voltage sampling; and

a ramp signal generation unit generating the ramp signal according to the ramp bias voltage sampled by the ramp bias voltage sampling unit.

6. The CMOS image sensor of claim 5 , wherein the ramp bias voltage sampling unit samples the ramp bias voltage during both of a comparator reset period and a ramping period.

7. The CMOS image sensor of claim 5 , wherein the ramp bias voltage sampling unit samples the ramp bias voltage during a ramping period according to a control signal of an external control unit.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 10, 2015
From: KIM, JIN-SEON
To: SK HYNIX INC.
Reel/Frame 036585/0705 →
Priority Claims (1)
KR 10-2015-0051900 · Apr 13, 2015 · national
Continuity (1)
Related Publication 20160301883A1 · Oct 13, 2016