Semiconductor device comprising oxide semiconductor
Provided is a structure of a transistor, which enables a so-called normally-off switching element, and a manufacturing method thereof. Provided is a structure of a semiconductor device which achieves high-speed response and high-speed operation by improving on characteristics of a transistor, and a manufacturing method thereof. Provided is a highly reliable semiconductor device. In the transistor in which a semiconductor layer, source and drain electrode layers, a gate insulating layer, and a gate electrode layer are stacked in that order. As the semiconductor layer, an oxide semiconductor layer which contains at least four kinds of elements of indium, gallium, zinc, and oxygen, and has a composition ratio (atomic percentage) of indium as twice or more as a composition ratio of gallium and a composition ratio of zinc, is used.
1. A semiconductor device comprising:
an oxide semiconductor layer including a channel formation region; and
a gate electrode layer overlapping with the oxide semiconductor layer with a gate insulating film interposed therebetween,
wherein the oxide semiconductor layer contains at least four kinds of elements of indium, gallium, zinc, and oxygen,
wherein a composition ratio of indium is twice or more a composition ratio of gallium and a composition ratio of zinc,
wherein the composition ratio of zinc is larger than the composition ratio of gallium,
wherein each of the composition ratios is represented by atomic percentage, and
wherein the oxide semiconductor layer includes a c-axis aligned crystal region.
2. The semiconductor device according to claim 1 , wherein a region of the oxide semiconductor layer which does not overlap with the gate electrode layer includes a dopant.
3. The semiconductor device according to claim 1 , wherein a sidewall insulating layer is provided on a side surface of the gate electrode layer.
4. The semiconductor device according to claim 1 , further comprising a transistor including a channel formation region comprising silicon.
5. A semiconductor device comprising:
an oxide semiconductor layer including a channel formation region; and
a gate electrode layer overlapping with the oxide semiconductor layer with a gate insulating film interposed therebetween,
wherein the oxide semiconductor layer contains at least four kinds of elements of indium, gallium, zinc, and oxygen,
wherein a composition ratio of indium is twice or more a composition ratio of gallium and a composition ratio of zinc,
wherein each of the composition ratios is represented by atomic percentage, and
wherein the oxide semiconductor layer is formed with an oxide target having a composition ratio of indium:gallium: zinc=3:1:2.
6. The semiconductor device according to claim 5 , wherein a region of the oxide semiconductor layer which does not overlap with the gate electrode layer includes a dopant.
7. The semiconductor device according to claim 5 , wherein the oxide semiconductor layer includes a c-axis aligned crystal region.
8. The semiconductor device according to claim 5 , wherein a sidewall insulating layer is provided on a side surface of the gate electrode layer.
9. The semiconductor device according to claim 5 , further comprising a transistor including a channel formation region comprising silicon.
10. A semiconductor device comprising:
an oxide semiconductor layer including a channel formation region; and
a gate electrode layer overlapping with the oxide semiconductor layer with a gate insulating film interposed therebetween,
wherein the oxide semiconductor layer contains at least four kinds of elements of indium, gallium, zinc, and oxygen,
wherein a composition ratio of indium is twice or more a composition ratio of gallium and a composition ratio of zinc,
wherein the composition ratio of zinc is larger than the composition ratio of gallium,
wherein each of the composition ratios is represented by atomic percentage, and
wherein the oxide semiconductor layer is formed with an oxide target having a composition ratio of indium:gallium: zinc=3:1:2.
11. The semiconductor device according to claim 10 , wherein a region of the oxide semiconductor layer which does not overlap with the gate electrode layer includes a dopant.
12. The semiconductor device according to claim 10 , wherein the oxide semiconductor layer includes a c-axis aligned crystal region.
13. The semiconductor device according to claim 10 , wherein a sidewall insulating layer is provided on a side surface of the gate electrode layer.
14. The semiconductor device according to claim 10 , further comprising a transistor including a channel formation region comprising silicon.
15. A semiconductor device comprising:
a transistor including a channel formation region comprising silicon, the transistor including a first gate electrode layer;
an oxide semiconductor layer including a channel formation region, the oxide semiconductor layer being electrically connected to the first gate electrode layer; and
a second gate electrode layer overlapping with the oxide semiconductor layer with a gate insulating film interposed therebetween,
wherein the oxide semiconductor layer contains at least four kinds of elements of indium, gallium, zinc, and oxygen,
wherein a composition ratio of indium is larger than a composition ratio of zinc,
wherein the composition ratio of zinc is larger than a composition ratio of gallium, and
wherein each of the composition ratios is represented by atomic percentage.
16. The semiconductor device according to claim 15 , wherein a region of the oxide semiconductor layer which does not overlap with the second gate electrode layer includes a dopant.
17. The semiconductor device according to claim 15 , wherein a sidewall insulating layer is provided on a side surface of the second gate electrode layer.
18. The semiconductor device according to claim 15 , wherein the oxide semiconductor layer is formed with an oxide target having a composition ratio of indium: gallium: zinc=3:1:2.
19. The semiconductor device according to claim 15 , wherein the oxide semiconductor layer is formed with an oxide target having a composition ratio of indium: gallium: zinc=4:2:3.