IP Library Granted Patent US 9,607,874
Granted Patent B2
US 9,607,874 · App. 14/851,996 · Granted Mar 28, 2017

Plasma processing apparatus

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Quick Facts
Patent No.
US 9,607,874
App. No.
14/851,996
Granted
Mar 28, 2017
Kind
B2
Abstract

A plasma processing apparatus includes a stage in a processing chamber where plasma is formed, a wafer to be processed, and an electrode arranged at an upper part of the stage and supplied with power to electrostatically attract and hold the wafer on the stage, and consecutively processing a plurality of wafers one by one. There are plural processing steps of conducting processing using the plasma under different conditions and there are plural periods when formation of plasma is stopped between the processing steps. An inner wall of the processing chamber is coated before starting the processing of any wafer, and voltage supplied to the electrode is changed according to a balance of respective polarities of particles floating and charged in the processing chamber in each period when formation of plasma is stopped.

Claims (13)

1. A plasma processing method comprising:

mounting a processing object wafer on an upper surface of a stage arranged inside of a vacuum chamber and at a pressure-reduced inner side of the vacuum chamber;

supplying power to an electrode arranged at an upper part of the stage to electrostatically attract and hold the wafer on the upper surface of the stage; and

forming plasma in the processing chamber and supplying high-frequency power to the stage to conduct processing of the wafer,

wherein the method includes a plurality of processing steps of conducting processing of the wafer under different conditions and a plurality of periods when formation of plasma is stopped between the processing steps,

wherein voltage supplied to the electrode is changed according to a balance of respective polarities of particles floating and charged in the processing chamber in each period when formation of the plasma is stopped.

2. The plasma processing method according to claim 1 ,

wherein the quartz plate constitutes a ceiling surface of the processing chamber, and on a surface of a quartz cylinder member arranged above the upper surface of the stage and constituting an inner wall of the processing chamber, and

wherein a potential formed on the wafer is reduced over elapse of time by voltage supplied to the electrode in the plurality of periods when plasma is stopped.

3. The plasma processing method according to claim 1 ,

wherein potential formed on the wafer by voltage supplied to the electrode is reduced along with increase in a processed number of the wafers in the plurality of periods when plasma is stopped.

4. The plasma processing method according to claim 2 ,

wherein potential formed on the wafer by voltage supplied to the electrode is reduced along with increase in a processed number of the wafers in the plurality of periods when plasma is stopped.

Assignments (2)
CHANGE OF NAME AND ADDRESS Recorded Mar 30, 2020
From: HITACHI HIGH-TECHNOLOGIES CORPORATION
To: HITACHI HIGH-TECH CORPORATION
Reel/Frame 052259/0227 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 15, 2015
From: KOBAYASHI, HIROYUKI; TAMURA, TOMOYUKI; ISHIGURO, MASAKI; SHIRAYONE, SHIGERU; IKENAGA, KAZUYUKI; NAWATA, MAKOTO
To: HITACHI HIGH-TECHNOLOGIES CORPORATION
Reel/Frame 036564/0914 →