IP Library Granted Patent US 10,074,432
Granted Patent B2
US 10,074,432 · App. 14/856,105 · Granted Sep 11, 2018

Programming of memory devices

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Quick Facts
Patent No.
US 10,074,432
App. No.
14/856,105
Granted
Sep 11, 2018
Kind
B2
Abstract

Methods of operating a memory device include programming a page of a memory block of the memory device using a particular starting programming voltage, determining a programming voltage indicative of a programming efficiency of the page of the memory block during programming of the page of the memory block, storing a representation of the programming voltage indicative of the programming efficiency of the page of the memory block, setting a starting programming voltage for a different page of the memory block in response to the stored representation of the programming voltage indicative of the programming efficiency of the page of the memory block, and programming the different page of the memory block using its starting programming voltage.

Claims (21)

1. A method of operating a memory device, comprising:

programming a page of a memory block of the memory device using a particular starting programming voltage;

determining a programming voltage indicative of a programming efficiency of the page of the memory block during programming of the page of the memory block;

storing a representation of the programming voltage indicative of the programming efficiency of the page of the memory block;

setting a starting programming voltage for a different page of the memory block in response to the stored representation of the programming voltage indicative of the programming efficiency of the page of the memory block; and

programming the different page of the memory block using its starting programming voltage;

wherein setting the starting programming voltage for the different page of the memory block in response to the stored representation of the programming voltage indicative of the programming efficiency of the page of the memory block comprises setting the starting programming voltage for the different page of the memory block to be equal to the programming voltage indicative of the programming efficiency of the page of the memory block.

2. The method claim 1 , wherein determining the programming voltage indicative of the programming efficiency of the page of the memory block comprises:

determining a programming voltage of a programming pulse of a series of incrementally increasing programming pulses after which, for a first time during the programming of the page of the memory block, at least one memory cell of the page of the memory block is verified programmed; or

determining a programming voltage of a programming pulse of the series of incrementally increasing programming pulses, wherein after a next subsequent programming pulse of the series of incrementally increasing programming pulses, and for a first time during the programming of the page of the memory block, at least some memory cells of the page of the memory block are verified programmed.

3. The method of claim 1 , wherein storing the representation of the programming voltage indicative of the programming efficiency of the page of the memory block comprises storing the representation of the programming voltage indicative of the programming efficiency of the page of the memory block to a random access memory of the memory device.

4. The method of claim 3 , wherein storing the representation of the programming voltage indicative of the programming efficiency of the page of the memory block to the random access memory of the memory device comprises storing the representation of the programming voltage indicative of the programming efficiency of the page of the memory block to a random access memory of a controller of the memory device.

5. The method of claim 3 , further comprising, in addition to storing the representation of the programming voltage indicative of the programming efficiency of the page of the memory block to the random access memory of the memory device, storing another representation of the programming voltage indicative of the programming efficiency of the page of the memory block to a spare area of the memory block.

6. The method of claim 1 , wherein storing the representation of the programming voltage indicative of the programming efficiency of the page of the memory block comprises storing the representation of the programming voltage indicative of the programming efficiency of the page of the memory block to a spare area of the memory block.

7. The method of claim 6 , wherein storing the representation of the programming voltage indicative of the programming efficiency of the page of the memory block to the spare area of the memory block comprises storing the representation of the programming voltage indicative of the programming efficiency of the page of the memory block to a spare area of a particular page of the memory block.

8. The method of claim 1 , wherein programming the page of the memory block of the memory device comprises programming page 0 of the memory block.

9. The method of claim 8 , wherein storing the representation of the programming voltage indicative of the programming efficiency of the page of the memory block comprises storing the representation of the programming voltage indicative of the programming efficiency of the page of the memory block to a random access memory of the memory device, and storing another representation of the programming voltage indicative of the programming efficiency of the page of the memory block to a spare area of page 0 of the memory block.

10. The method of claim 1 , further comprising:

setting a starting programming voltage for each remaining page of the memory block in response to the stored representation of the programming voltage indicative of the programming efficiency of the page of the memory block; and

programming each remaining page of the memory block using its respective starting programming voltage.

11. The method of claim 10 , wherein programming the different page of the memory block using its starting programming voltage and programming each remaining page of the memory block using its respective starting programming voltage comprises programming the different page of the memory block and each remaining page of the memory block using particular starting programming voltages having a same value.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →