IP Library Granted Patent US 9,337,835
Granted Patent B2
US 9,337,835 · App. 14/857,794 · Granted May 10, 2016

Controlling a flash device having time-multiplexed, on-die-terminated signaling interface

Inventors: Kyung Suk Oh (Cupertino, CA); Ian P. Shaeffer (Los Gatos, CA)
Assignee: Rambus Inc.
H03K19/0005G06F13/4086G11C11/401G11C11/4063G11C11/4093G11C11/41G11C11/413G11C11/417G11C11/419G11C16/06G11C16/26G11C16/32H03K19/017545
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,337,835
App. No.
14/857,794
Granted
May 10, 2016
Kind
B2
Abstract

An IC die transmits command signals, address signals and data signals to a flash memory device at respective times via a time-multiplexed external signaling line, the data signals representing data to be stored within an array of non-volatile storage elements of the flash memory device. The IC die additionally transmits a control signal to the flash memory device via one or more external control signal lines, the control signal directing the flash memory device to switchably couple an on-die termination element to the time-multiplexed signaling line.

Claims (26)

1. An integrated circuit (IC) die having a memory controller function to control a flash memory device having an array of non-volatile storage elements and a termination element, the IC die comprising:

a first signaling circuit to transmit to the flash memory device, via a time-multiplexed signaling line external to the IC die, command signals, address signals and data signals at respective times, the data signals representing data to be stored within the array of non-volatile storage elements; and

circuitry to transmit a control signal to the flash memory device via one or more control signal lines external to the IC die, the control signal to direct the flash memory device to switchably couple the termination element to the time-multiplexed signaling line.

2. The IC die of claim 1 wherein the control signal comprises an enable signal.

3. The IC die of claim 1 wherein the flash memory device switchably couples the termination element to the time-multiplexed signaling line at least in part in response to (i) transition of the control signal from a first logic state to a second logic state, and (ii) one or more of the command signals transmitted via the time-multiplexed signaling line.

4. The IC die of claim 1 wherein the control signal comprises a termination control signal to be transmitted via a termination control line.

5. The IC die of claim 1 wherein the first signaling circuit transmits, to the flash memory device, a value that indicates a first resistance to be implemented by the termination element.

6. The IC die of claim 1 wherein the first signaling circuit transmits, to the flash memory device, first and second values that indicate respective first and second resistances to be implemented at different times by the termination element of the flash memory device.

7. The IC die of claim 1 wherein the circuitry to transmit the control signal comprises differential signaling circuitry to transmit the control signal via a differential signaling path having first and second constituent signaling lines.

8. The IC die of claim 1 wherein the first signaling circuit comprises receiver circuitry to receive a data signal via the time-multiplexed signaling line during a data reception interval in which neither command, address nor data signals are being transmitted by the first signaling circuit.

9. The IC die of claim 1 further comprising a circuit to transmit, to the flash memory device, a chip-select signal indicating that the flash memory device is a target for a signaling transaction.

10. The IC die of claim 1 further comprising a circuit to transmit, to the flash memory device, a chip-select signal that enables the flash memory device to respond to a command conveyed, at least in part, by one or more of the command signals transmitted by the first signaling circuit via the time-multiplexed signaling line.

11. The IC die of claim 1 further comprising a second signaling circuit to transmit a timing signal to the flash memory device via a timing signal line external to the IC die.

12. A method of operation within a IC die that controls a flash memory device having an array of non-volatile storage elements and a termination element, the method comprising:

transmitting to the flash memory device, via a time-multiplexed signaling line external to the IC die, command signals, address signals and data signals at respective times, the data signals representing data to be stored within the array of non-volatile storage elements; and

transmitting a control signal to the flash memory device via one or more control signal lines external to the IC die, the control signal directing the flash memory device to switchably couple the termination element to the time-multiplexed signaling line.

13. The method of claim 12 wherein transmitting the control signal comprises transmitting an enable signal.

14. The method of claim 12 wherein transmitting the control signal via one or more control signal lines comprises transmitting a termination control signal via a termination control line.

15. The method of claim 12 wherein transmitting the command signals to the flash memory device comprises transmitting a command that directs the flash memory device to store, within a programmable storage register of the flash memory device, a value that indicates a first resistance to be implemented by the termination element.

16. The method of claim 12 wherein transmitting the command signals to the flash memory device comprises transmitting a command that directs the flash memory device to store, within one or more programmable storage registers of the flash memory device, first and second values that indicate first and second resistances to be implemented at different times by the termination element.

17. The method of claim 12 wherein transmitting the control signal via one or more control lines comprises transmitting a differential control signal via first and second constituent signaling lines of a differential signaling path.

18. The method of claim 12 further comprising receiving a read data signal from the flash memory device via the time-multiplexed signaling line during a data reception interval in which neither command, address nor data signals are being transmitted by the IC die, wherein the flash memory device is to switchably decouple the termination element from the time-multiplexed signaling line while transmitting the read data signal.

19. The method of claim 12 further comprising transmitting a chip-select signal to the flash memory device indicating that the flash memory device is a target for a signaling transaction.

20. A non-transitory machine-readable medium that stores data representative of an IC die comprising:

a first signaling circuit to transmit to a flash memory device, via a time-multiplexed signaling line external to the IC die, command signals, address signals and data signals at respective times, the data signals representing data to be stored within an array of non-volatile storage elements of the flash memory device; and

circuitry to transmit a control signal to the flash memory device via one or more control signal lines external to the IC die, the control signal to direct the flash memory device to switchably couple a termination element of the flash memory device to the time-multiplexed signaling line.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 15, 2025
From: RAMBUS INC.
To: SIGNAL LLP
Reel/Frame 073085/0650 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 25, 2015
From: OH, KYUNG SUK; SHAEFFER, IAN P.
To: RAMBUS INC.
Reel/Frame 036662/0647 →
Continuity (10)
Continuation 14523923 · Oct 26, 2014
Continuation 13952393 · Jul 26, 2013
Continuation 13480298 · May 24, 2012
Continuation 13180550 · Jul 12, 2011
Continuation 13043946 · Mar 9, 2011
Continuation 12861771 · Aug 23, 2010
Continuation 12507794 · Jul 22, 2009
Continuation 12199726 · Aug 27, 2008
Continuation 11422022 · Jun 2, 2006
Related Publication 20160005489A1 · Jan 7, 2016