Semiconductor memory device
View Patent ↗A semiconductor memory device according to an embodiment comprises a memory cell array configured from a plurality of row lines and column lines that intersect one another, and from a plurality of memory cells disposed at each of intersections of the row lines and column lines and each including a variable resistance element. Where a number of the row lines is assumed to be N, a number of the column lines is assumed to be M, and a ratio of a cell current flowing in the one of the memory cells when a voltage that is half of the select voltage is applied to the one of the memory cells to a cell current flowing in the one of the memory cells when the select voltage is applied to the one of the memory cells is assumed to be k, a relationship M 2 <2×N×k is satisfied.
1. A manufacturing method of a semiconductor memory device, comprising:
forming a stacked body in a first direction above a semiconductor substrate, the stacked body having a first conducting film and a first insulating film stacked therein;
depositing a first mask in the first direction on the stacked body, the first mask extending in a second direction;
depositing a second mask on a side wall in a third direction of the first mask, the second mask extending in the second direction;
etching a first trench to a first depth in the first direction in the stacked body using the first and second masks;
eliminating the first mask; and
etching a second trench to a second depth in the first direction in the stacked body using the second mask.
2. The manufacturing method of the semiconductor memory device according to claim 1 , wherein
the first depth of the first trench is different from the second depth of the second trench.
3. The manufacturing method of the semiconductor memory device according to claim 2 , wherein
the first depth of the first trench is deeper than the second depth of the second trench.
4. The manufacturing method of the semiconductor memory device according to claim 1 , further comprising:
depositing a second conducting film in the first trench after forming the first trench;
depositing a third conducting film in the second trench after forming the second trench; and
etching a third trench to a certain depth in the first direction in the second and third conducting films after depositing the second and third conducting films.
5. The manufacturing method of the semiconductor memory device according to claim 4 , wherein
a lower end of the second conducting film is lower than a lower end of the third conducting film in the first direction, and
an upper end of the third conducting film is higher than an upper end of the second conducting film in the first direction.
6. The manufacturing method of the semiconductor memory device according to claim 5 , further comprising:
depositing a second insulating film in the first direction above the second conducting film; and
depositing a fourth conducting film in the first direction above the second insulating film, wherein
the second conducting film connects to the semiconductor substrate, and is isolated from the fourth conducting film, and
the third conducting film connects to the fourth conducting film, and is isolated from the semiconductor substrate.
7. The manufacturing method of the semiconductor memory device according to claim 4 , further comprising:
depositing a first resistance varying material on a side surface in the third direction of the first trench after etching the first trench and before depositing the second conducting film; and
depositing a second resistance varying material on a side surface in the third direction of the second trench after etching the second trench and before depositing the third conducting film.
8. The manufacturing method of the semiconductor memory device according to claim 4 , wherein
an extending direction of the first and second trenches intersects an extending direction of the third trench.