IP Library Granted Patent US 9,698,346
Granted Patent B2
US 9,698,346 · App. 14/861,259 · Granted Jul 4, 2017

Thermally optimized phase change memory cells and methods of fabricating the same

Inventors: Mattia Boniardi (Cormano, IT); Andrea Redaelli (Castatenovo, IT)
Assignee: MICRON TECHNOLOGY, INC.
H01L45/1293H01L27/2427H01L27/2445H01L27/2463H01L45/06H01L45/1233H01L45/1253H01L45/141H01L45/144H01L45/16
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Quick Facts
Patent No.
US 9,698,346
App. No.
14/861,259
Granted
Jul 4, 2017
Kind
B2
Abstract

A thermally optimized phase change memory cell includes a phase change material element disposed between first and second electrodes. The second electrode includes a thermally insulating region having a first thermal resistivity over the first electrode and a metallic contact region interposed between the phase change material element and the thermally insulating region, where the metallic contact layer has a second thermal resistivity lower than the first thermal resistivity.

Claims (39)

1. A method of fabricating an electronic device comprising:

forming a first electrode;

forming a phase change material element on the first electrode; and

forming a second electrode on the phase change material element; and

forming a metallic access line on the second electrode,

wherein forming the second electrode comprises:

forming a metallic contact region on the phase change material element, and

forming a thermally insulating region comprising carbon on the metallic contact region, the thermally insulating region having a first thermal resistivity that is greater than a second thermal resistivity of the metallic contact region,

wherein forming the first electrode comprises:

forming a second thermally insulating region comprising carbon; and

forming a second metallic contact region interposed between the phase change material element and the second thermally insulating region, the second thermally insulating region having a third thermal resistivity that is greater than a fourth thermal resistivity of the second metallic contact region.

2. The method of claim 1 , wherein forming the second electrode and forming the phase change material element comprise providing dimensions and electrical resistivities such that an electrical resistance of a bulk material of the phase change material element is greater than a combined electrical resistance of a bulk material of the thermally insulating region, a bulk material of the metallic contact region and an interface between the metallic contact region and the phase change material element.

3. A method of fabricating an electronic device comprising:

forming a first electrode;

forming a phase change material element on the first electrode;

forming a second electrode on the phase change material element, the second electrode comprising a metallic contact region on the phase change material element and a thermally insulating region comprising carbon on the metallic contact region, wherein the thermally insulating region has a first thermal resistivity and the metallic contact region has a second thermal resistivity lower than the first thermal resistivity; and

forming an access line on the second electrode and extending in a first direction, wherein the access line and at least the second electrode have a same nominal width measured in a second direction crossing the first direction.

4. The method of claim 3 , wherein the phase change material element and the first electrode have the same nominal width.

5. The method of claim 3 , further comprising forming a second access line disposed under the phase change material element and extending in the second direction.

6. The method of claim 1 , wherein the second thermal resistivity of the metallic contact region is lower than the first thermal resistivity by a ratio of at least 10.

7. The method of claim 6 , wherein the metallic contact region comprises tungsten.

8. The method of claim 7 , wherein the metallic contact region consists essentially of tungsten.

9. The method of claim 1 , wherein the thermally insulating region consists essentially of carbon.

10. The method of claim 1 , wherein forming the second electrode includes contacting the metallic contact region to the phase change material element.

11. The method of claim 1 , further including forming sidewall thermal insulators over sidewalls of the phase change material element.

12. The method of claim 11 , wherein forming the sidewall thermal insulators includes forming first sidewall layers on the sidewalls of the phase change material element, and further forming second sidewall layers on first sidewall layers.

13. The method of claim 1 , wherein the second thermally insulating region is formed of the same material as the thermally insulating region.

14. The method of claim 1 , wherein the second metallic contact region is formed of the same material as the metallic contact region.

15. The method of claim 1 , wherein forming the first electrode comprises forming a wall structure having a wall width along a first horizontal direction and a wall thickness along a second horizontal direction substantially perpendicular to the first horizontal direction, wherein the wall thickness is substantially smaller than the wall width.

16. A method of fabricating an electronic device comprising:

forming a first access line extending in a first direction, a second access line extending in a second direction crossing the first direction, and a phase change material element vertically interposed between the first access line and the second access line; and

forming an electrode vertically interposed between the phase change material element and the first access line, wherein the electrode comprises a thermally insulating region comprising carbon and having a first thermal resistivity and a metallic contact region interposed between the phase change material element and the thermally insulating region, the metallic contact region having a second thermal resistivity lower than the first thermal resistivity, wherein forming the electrode includes patterning and etching to define at least one dimension of the electrode and the first access line within a single photo mask level, such that the electrode and the first access line have a same first nominal lateral dimension in the second direction.

17. The method of claim 16 , wherein forming the electrode further includes, within another second photo mask level, further patterning and further etching to define another dimension of the electrode along with the second access line within another single photo mask level, such that the electrode and the second access line have a same second nominal lateral dimension in the first direction.

18. The method of claim 16 , further including forming a second electrode interposed between the phase change material element and the second access line.

19. The method of claim 18 , wherein the second electrode comprises a second thermally insulating region comprising carbon and having a third thermal resistivity and a second metallic contact region interposed between the phase change material element and the second thermally insulating region, the second metallic contact region having a fourth thermal resistivity lower than the third thermal resistivity.

20. The method of claim 18 , wherein the phase change material element is a phase change memory element.

21. The method of claim 20 , further comprising forming a selector element interposed between the first access line and the second access line, wherein the second electrode is interposed between the phase change memory element and the selector element.

22. The method of claim 21 , wherein the selector element is formed of a chalcogenide material different from the phase change memory element.

23. The method of claim 16 , wherein each of the first access line and the second access line comprises metal lines.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
Continuity (2)
Division 13908707 · Jun 3, 2013
Related Publication 20160013404A1 · Jan 14, 2016