Instruction and logic for programmable fabric hierarchy and cache
A processor includes a core within a package and layers of programmable fabric within the same package as the core. The core includes logic to execute an instruction by loading a configuration file to one of the layers of programmable fabric. The configuration is to program an identified execution functionality. The execution functionality is to execute at least part of the instruction.
1. A processor, comprising:
a core within a package;
a first layer of programmable fabric within the same package as the core; and
a second layer of programmable fabric within the same package as the core;
wherein the core includes an execution unit to execute an instruction to:
determine that size of the first layer of programmable fabric is smaller than size of the second layer of programmable fabric; and
load a configuration file to the second layer of programmable fabric, wherein the configuration file identifies a configuration, the configuration file is loaded to the second layer based on determination that the size of the first layer is smaller than the size of the second layer and the configuration, the configuration is to program an identified execution functionality, and the execution functionality is to execute at least part of the instruction.
2. The processor of claim 1 , wherein:
the execution unit is to load the configuration to either the first layer of programmable fabric or the second layer of programmable fabric based upon a determination whether a number of executions to be performed by the configuration exceeds a threshold.
3. The processor of claim 1 , wherein:
the first layer of programmable fabric is smaller than the second layer of programmable fabric; and
the core is located closer to the first layer of programmable fabric than the second layer of programmable fabric.
4. The processor of claim 1 , further comprising a configuration cache communicatively coupled to the first layer of programmable fabric, the configuration cache to store a plurality of configurations before the configuration is to be loaded to the first layer of programmable fabric.
5. The processor of claim 1 , wherein:
the first layer of programmable fabric includes a plurality of programmable logic arrays;
the processor further comprises a plurality of configuration caches, each configuration cache communicatively coupled to a respective programmable fabric array, each configuration cache to store a plurality of configurations before the configuration is to be loaded to the first layer of programmable fabric; and
the processor further comprises a higher-level configuration cache to store configurations for use by the plurality of configuration caches.
6. The processor of claim 1 , wherein:
the processor further comprises a configuration cache communicatively coupled to the first layer of programmable fabric, the configuration cache to store a plurality of configurations before the configuration is to be loaded to the first layer of programmable fabric; and
the processor includes logic to lock a plurality of cache configuration lines located in the configuration cache during operation of the execution functionality.
7. The processor of claim 1 , further comprising a fabric interface controller communicatively coupled to the core and to the first layer of programmable fabric, the fabric interface controller including logic to interpret commands to load the configuration and perform the execution functionality.
8. A method comprising, within a processor:
decoding an instruction;
determining from the decoding that the instruction is to be executed by programmable fabric within the same package as a core;
determining whether a first or second layer of programmable fabric is larger in size;
loading a configuration file to either the first layer or the second layer of programmable fabric within the same package as the core, wherein the configuration file identifies a configuration, the configuration file is loaded to either the first layer or the second layer based upon the relative size of the layers and upon whether a number of executions to be performed by the configuration exceeds a threshold number, wherein the configuration is to program an identified execution functionality; and
performing the execution functionality to execute at least part of the instruction.
9. The processor of claim 8 , further comprising storing a plurality of configurations in a configuration cache communicatively coupled to the first layer of programmable fabric before the configuration is to be loaded.
10. The method of claim 8 , further comprising:
storing a plurality of configurations in a configuration cache communicatively coupled to the first layer of programmable fabric before the configuration is to be loaded; and
storing configurations for use by the plurality of configuration caches in a higher-level configuration cache.
11. The method of claim 8 , further comprising:
storing a plurality of configurations in a configuration cache communicatively coupled to the first layer of programmable fabric before the configuration is to be loaded; and
locking a plurality of cache configuration lines during operation of the execution functionality.
12. The method of claim 8 , further comprising:
interpreting commands from the core to load the configuration and perform the execution functionality, the commands decoded from the instruction; and
establishing memory paths between the layers of programmable fabric and storage based upon the loading of the configuration.
13. A system comprising:
a core within a package;
a first layer of programmable fabric within the same package as the core; and
a second layer of programmable fabric within the same package as the core;
wherein the core includes an execution unit to execute an instruction to:
determine that size of the first layer of programmable fabric is smaller than size of the second layer of programmable fabric; and
load a configuration file to the second layer of programmable fabric, wherein the configuration file identifies a configuration, the configuration file is loaded to the second layer based on determination that the size of the first layer is smaller than the size of the second layer and the configuration, the configuration is to program an identified execution functionality, and the execution functionality is to execute at least part of the instruction.
14. The system of claim 13 , wherein:
the execution unit is to load the configuration to either the first layer of programmable fabric or the second layer of programmable fabric based upon a determination whether a number of executions to be performed by the configuration exceeds a threshold.
15. The system of claim 13 , wherein:
the first layer of programmable fabric is smaller than the second layer of programmable fabric; and
the core is located closer to the first layer of programmable fabric than the second layer of programmable fabric.
16. The system of claim 13 , further comprising a configuration cache communicatively coupled to the first layer of programmable fabric, the configuration cache to store a plurality of configurations before the configuration is to be loaded to the first layer of programmable fabric.
17. The system of claim 13 , wherein:
the first layer of programmable fabric includes a plurality of programmable logic arrays;
the system further comprises a plurality of configuration caches, each configuration cache communicatively coupled to a respective programmable fabric array, each configuration cache to store a plurality of configurations before the configuration is to be loaded to the first layer of programmable fabric; and
the system further comprises a higher-level configuration cache to store configurations for use by the plurality of configuration caches.
18. The system of claim 13 , wherein:
the system further comprises a configuration cache communicatively coupled to the first layer of programmable fabric, the configuration cache to store a plurality of configurations before the configuration is to be loaded to the first layer of programmable fabric; and
the system includes logic to lock a plurality of cache configuration lines located in the configuration cache during operation of the execution functionality.
19. The system of claim 13 , further comprising a fabric interface controller communicatively coupled to the core and to the first layer of programmable fabric, the fabric interface controller including logic to interpret commands to load the configuration and perform the execution functionality.