IP Library Granted Patent US 9,728,245
Granted Patent B2
US 9,728,245 · App. 14/865,754 · Granted Aug 8, 2017

Precharging and refreshing banks in memory device with bank group architecture

Inventors: Kuljit S Bains (Olympia, WA); John B Halbert (Beaverton, OR); Nadav Bonen (Ofer, IL); Tomer Levy (Tel Aviv, IL)
Assignee: Intel Corporation
G11C11/40618G11C11/4087G11C11/40603G11C11/40611
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Quick Facts
Patent No.
US 9,728,245
App. No.
14/865,754
Granted
Aug 8, 2017
Kind
B2
Abstract

Memory subsystem refresh management enables commands to access one or more identified banks across different bank groups with a single command. Instead of sending commands identifying a bank or banks in separate bank groups by each bank group individually, the command can cause the memory device to access banks in different bank groups. The command can be a refresh command. The command can be a precharge command.

Claims (35)

1. A memory device comprising:

multiple banks of memory in a bank group architecture where banks of memory resources are separately addressable in bank groups by bank group identifier and bank identifier;

I/O (input/output) hardware to couple to a memory controller and receive a command from the memory controller, the command including a bank identifier; and

logic to decode the command and access banks corresponding to the bank identifier in response to the command, including banks identified by the bank identifier in multiple different bank groups.

2. The memory device of claim 1 , wherein the I/O hardware is configured to receive the command having a bank identifier for more than one bank.

3. The memory device of claim 1 , wherein the I/O hardware is configured to receive the command not having a bank group identifier.

4. The memory device of claim 1 , wherein the I/O hardware is configured to receive the command having a bank group identifier to select all bank groups.

5. The memory device of claim 1 , wherein the command comprises a refresh command.

6. The memory device of claim 1 , wherein the command comprises a precharge command.

7. The memory device of claim 1 , wherein the command comprises a sequence of a precharge command and a refresh command to access the same bank identifier in different bank groups.

8. The memory device of claim 1 , further comprising a memory controller coupled to the memory device.

9. The memory device of claim 8 , further comprising at least one processor and a network interface, the at least one processor communicatively coupled to the memory controller and the network interface communicatively coupled to the at least one processor.

10. A method for refresh in a memory subsystem, comprising:

receiving a command at a memory device from a memory controller, the command including a bank identifier, the memory device having a bank group architecture where banks of memory resources are separately addressable in bank groups by bank group identifier and bank identifier; and

in response to receiving the command, causing banks corresponding to the bank identifier to execute the command, including banks identified by the bank identifier in multiple different bank groups.

11. The method of claim 10 , wherein receiving the command comprises receiving a command including a bank identifier for more than one bank.

12. The method of claim 10 , wherein receiving the command comprises receiving a command not including a bank group identifier.

13. The method of claim 10 , wherein receiving the command comprises receiving a command including a bank group identifier to select all bank groups.

14. The method of claim 10 , wherein the command comprises a refresh command.

15. The method of claim 10 , wherein the command comprises a precharge command.

16. The method of claim 10 , wherein receiving the command comprises receiving a sequence of a precharge command and a refresh command to access the same bank identifier in different bank groups.

17. A memory controller comprising:

command logic to determine to send a command for execution on a portion of an associated memory device to access only an identified portion of the memory device, the memory device having a bank group architecture where banks of memory resources are separately addressable in bank groups by bank group identifier and bank identifier; and

I/O (input/output) hardware to couple to the memory device, the I/O hardware to generate and send the command to the memory device, the command including a bank identifier, the command to access banks corresponding to the bank identifier within the memory device for execution of the command, including banks identified by the bank identifier in multiple different bank groups.

18. The memory controller of claim 17 , wherein the I/O hardware to send the command comprises the I/O hardware configured to send the command with a bank identifier for more than one bank.

19. The memory controller of claim 17 , wherein the I/O hardware to send the command comprises the I/O hardware configured to send the command without a bank group identifier.

20. The memory controller of claim 17 , wherein the I/O hardware to send the command comprises the I/O hardware configured to send the command with a bank group identifier to select all bank groups.

21. The memory controller of claim 17 , wherein the I/O hardware to send the command comprises the I/O hardware configured to send a precharge command, a refresh command, or both in sequence to access the same bank identifier in different bank groups.

22. A method for refresh in a memory subsystem, comprising:

determining to send a command for execution on a portion of an associated memory device to access only an identified portion of the memory device, the memory device having a bank group architecture where banks of memory resources are separately addressable in bank groups by bank group identifier and bank identifier; and

sending the command to the memory device, the command including a bank identifier, the command to access banks corresponding to the bank identifier within the memory device for execution of the command, including banks identified by the bank identifier in multiple different bank groups.

23. The method of claim 22 , wherein sending the command includes sending a bank identifier for more than one bank.

24. The method of claim 22 , wherein sending the command includes sending the command without a bank group identifier.

25. The method of claim 22 , wherein sending the command includes sending a bank group identifier to select all bank groups.

26. The method of claim 22 , wherein sending the command comprises sending a precharge command, a refresh command, or both in sequence to access the same bank identifier in different bank groups.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 6, 2020
From: INTEL CORPORATION
To: SONY CORPORATION
Reel/Frame 054340/0280 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 19, 2017
From: BAINS, KULJIT S.; HALBERT, JOHN B.; BONEN, NADAV; LEVY, TOMER
To: INTEL CORPORATION
Reel/Frame 042741/0799 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 1, 2016
From: BAINS, KULJIT S.; HALBERT, JOHN B.; BONEN, NADAV; LEVY, TOMER
To: INTEL CORPORATION
Reel/Frame 039067/0317 →
Continuity (2)
Provisional Application 62126597 · Feb 28, 2015
Related Publication 20160254044A1 · Sep 1, 2016