Anti-passback algorithm for reading a public or secure object
An anti-passback algorithm for an access control system is described. The anti-passback algorithm prevents the use of valid credentials to gain access to an access-controlled area by more than one person within a given period of time. The algorithm is capable of distinguishing between credentials intentionally presented to the access control system and credentials that are unintentionally read by the access control system. Certain variables may be set by the access control system manufacturer or a trusted individual to adapt the algorithm for applications.
1. A reader for an access control system, comprising:
an antenna configured to generate electromagnetic signals and facilitate information exchanges with one or more data storage devices that are presented within a read range of the reader;
a driver circuit configured to provide an excitation signal to the antenna at periodic intervals, thereby enabling the antenna to poll for one or more data storage devices within the read range at periodic intervals;
a processor configured to receive data from a tag in response to one or more polls by the antenna;
a poll counter that maintains a poll counter value corresponding to a number of times that the antenna polls for one or more data storage devices after the processor first receives the data from the tag;
a read counter that maintains a read counter value for a number of times that the processor receives the data from the tag in response to a poll;
an anti-passback counter that is assigned an anti-passback counter value of zero after the processor first receives the data from the tag; and
a data structure that maintains an identification code for the tag, the poll counter value, the read counter value, and the anti-passback counter value;
wherein the reader is configured to report tag identification information when the read counter value reaches a predetermined maximum read counter value.
2. The reader of claim 1 , wherein:
the read counter is configured to increment the read counter value when the processor receives the data from the tag;
the poll counter is configured to decrement the poll counter value from an initial nonzero value each time the antenna polls for one or more data storage devices within the read range, but only if the anti-passback counter value is equal to zero; and
the anti-passback counter is configured to decrement the anti-passback counter value each time the antenna polls for one or more data storage devices within the read range, but only if the anti-passback value is nonzero.
3. The reader of claim 2 , wherein the initial nonzero value is an integer value between 3 and 100.
4. The reader of claim 1 , wherein the anti-passback counter is configured to set the anti-passback counter value to a nonzero predetermined maximum anti-passback counter value when the read counter value reaches the predetermined maximum read counter value.
5. The reader of claim 4 , wherein the anti-passback counter is configured to set the anti-passback counter value to the nonzero predetermined maximum anti-passback counter value if the processor receives the data from the tag when the anti-passback counter value is nonzero.
6. The reader of claim 1 , wherein at least one of the identification code and the identification information is an EPC.
7. The reader of claim 1 , wherein at least one of the identification code and the identification information is an SIO.
8. The reader of claim 1 , wherein the data structure is configured to clear the identification code, the read counter value, the poll counter value, and the anti-passback counter value when both the anti-passback counter value and the poll counter value are equal to zero.
9. The reader of claim 1 , wherein the periodic interval is less than or equal to 40,000 microseconds.
10. The reader of claim 1 , wherein the periodic interval is less than or equal to 1500 microseconds.
11. The reader of claim 1 , wherein the data includes a message having only 210 bits.
12. The reader of claim 1 , wherein the data includes only 25 leading bits.
13. A reader for an access control system, comprising:
an antenna configured to facilitate wireless information exchanges with one or more data storage devices that are within a read range of the reader;
a driver circuit configured to provide an excitation signal to the antenna at periodic intervals, each excitation signal enabling the reader to poll for one or more data storage devices within the read range at periodic intervals; and
a data structure comprising:
a read counter that maintains a read counter value for a number of times that the processor receives data from a tag in response to a poll;
a poll counter that maintains a poll counter value corresponding to a number of times that the reader polls for one or more data storage devices after the processor first receives the data from the tag; and
an anti-passback counter that is assigned an anti-passback counter value of zero after the processor first receives the data from the tag;
wherein the reader is configured to report tag identification information when the read counter value reaches a predetermined maximum read counter value.
14. The reader of claim 13 , wherein the data structure stores an identification code of the tag.
15. The reader of claim 13 , wherein the data comprises the tag identification information.
16. The reader of claim 13 , wherein in response to first receiving the data from the tag, the read counter value is set to 1, the poll counter value is set to a predetermined nonzero value, and the anti-passback counter value is set to 0.
17. The reader of claim 13 , wherein the anti-passback counter value is set to a predetermined nonzero value in response to the read counter value reaching the predetermined maximum read counter value.
18. The reader of claim 17 , wherein the poll counter value does not change while the anti-passback counter value is nonzero.
19. The reader of claim 17 , wherein the anti-passback counter resets to the predetermined nonzero value in response to receiving the data from the tag while the anti-passback counter value is nonzero.
20. A reader with anti-passback protection, comprising:
a communication interface comprising an antenna operably connected to a driver circuit, the driver circuit configured to provide an excitation signal to the antenna at periodic intervals, the periodic excitation signals causing the reader to periodically poll for one or more tags, wherein the antenna is configured to receive data from a tag in read range of the reader in response to one of the periodic polls; and
a data structure comprising:
storage for an identification code of the tag;
a read counter that maintains a read counter value for a number of times that the processor receives the data from the tag in response to one of the periodic polls;
a poll counter that maintains a poll counter value corresponding to a number of periodic polls conducted by the reader after the processor first receives the data from the tag; and
an anti-passback counter that is assigned an anti-passback counter value of zero after the processor first receives the data from the tag;
wherein the reader is configured to report tag identification information when the read counter value reaches a predetermined maximum read counter value.