Schottky enhanced bias circuit
Embodiments disclosed herein relate to a bias circuit that uses Schottky diodes. Typically, a bias circuit will include a number of transistors used to generate a bias voltage or a bias current for a power amplifier. Many wireless devices include power amplifiers to facilitate processing signals for transmission and/or received signals. By substituting the bias circuit design with a design that utilizes Schottky diodes, the required battery voltage of the bias circuit may be reduced enabling the use of lower voltage power supplies.
1. A bias circuit comprising:
a first Schottky diode including a cathode and an anode, the cathode in electrical communication with a power amplifier;
a field effect transistor with a source in communication with the anode of the first Schottky diode;
a bipolar junction transistor in communication with the field effect transistor, the bipolar junction transistor including a collector in communication with a gate of the field effect transistor and a base in communication with the source of the field effect transistor, the field effect transistor and the bipolar junction forming a feedback loop; and
a frequency compensation circuit to stabilize the feedback loop.
2. The bias circuit of claim 1 wherein the field effect transistor is a common-drain amplifier.
3. The bias circuit of claim 1 wherein the first Schottky diode enables the bias circuit to operate using a voltage less than or equal to 2.5 volts.
4. The bias circuit of claim 1 wherein the frequency compensation circuit includes a resistor and a capacitor forming a resistor capacitor circuit.
5. The bias circuit of claim 1 wherein a size of the bipolar junction transistor is selected to match a size of a transistor of the power amplifier.
6. A bias circuit comprising:
a first Schottky diode including a cathode and an anode, the cathode in electrical communication with a power amplifier;
a field effect transistor with a source in communication with the anode of the first Schottky diode;
a bipolar junction transistor in communication with the field effect transistor, the bipolar junction transistor including a collector in communication with a gate of the field effect transistor and a base in communication with the source of the field effect transistor; and
a reference current source, the reference current source including a current source and a resistor.
7. The bias circuit of claim 6 wherein the reference current source is implemented separately from at least a portion of the bias circuit.
8. A bias circuit comprising:
a first Schottky diode including a cathode and an anode, the cathode in electrical communication with a power amplifier;
a field effect transistor with a source in communication with the anode of the first Schottky diode;
a bipolar junction transistor in communication with the field effect transistor, the bipolar junction transistor including a collector in communication with a gate of the field effect transistor and a base in communication with the source of the field effect transistor; and
a second Schottky diode in communication with an emitter of the bipolar junction transistor.
9. The bias circuit of claim 8 wherein a size of the first Schottky diode and a size of the second Schottky diode are selected such that a current density of the first Schottky diode and a current density of the second Schottky diode match.
10. A power amplifier module comprising:
a power amplifier; and
a bias circuit including a first Schottky diode and a second Schottky diode, the first Schottky diode including a cathode and an anode, the cathode in electrical communication with the power amplifier, the bias circuit further including a field effect transistor with a source in communication with the anode of the first Schottky diode, and the bias circuit further including a bipolar junction transistor in communication with the field effect transistor, the bipolar junction transistor including a collector in communication with a gate of the field effect transistor and a base in communication with the source of the field effect transistor, the second Schottky diode in communication with an emitter of the bipolar junction transistor.
11. The power amplifier module of claim 10 further comprising a reference current circuit in communication with the bias circuit.
12. The power amplifier module of claim 11 wherein the reference current circuit is implemented in silicon and the bias circuit is implemented using gallium arsenide.
13. The power amplifier module of claim 10 further comprising a power amplifier controller configured to set a bias operating current of the bias circuit.
14. A wireless device comprising:
a battery providing a voltage to a bias circuit; and
a power amplifier module including a power amplifier and the bias circuit, the bias circuit including a first Schottky diode and a second Schottky diode, the first Schottky diode including a cathode and an anode, the cathode in electrical communication with the power amplifier, the bias circuit further including a field effect transistor with a source in communication with the anode of the first Schottky diode, and the bias circuit further including a bipolar junction transistor in communication with the field effect transistor, the bipolar junction transistor including a collector in communication with a gate of the field effect transistor and a base in communication with the source of the field effect transistor, the second Schottky diode in communication with an emitter of the bipolar junction transistor.
15. The wireless device of claim 14 wherein the power amplifier module further includes a reference current circuit in communication with the bias circuit.
16. A wireless device comprising:
a battery providing a voltage to a bias circuit; and
a power amplifier module including a power amplifier and the bias circuit, the bias circuit including a first Schottky diode including a cathode and an anode, the cathode in electrical communication with the power amplifier, the bias circuit further including a field effect transistor with a source in communication with the anode of the first Schottky diode, and the bias circuit further including a bipolar junction transistor in communication with the field effect transistor, the bipolar junction transistor including a collector in communication with a gate of the field effect transistor and a base in communication with the source of the field effect transistor, the bias circuit further including a compensation circuit in communication between the gate of the field effect transistor and a base of the bipolar junction transistor.