IP Library Granted Patent US 9,773,738
Granted Patent B2
US 9,773,738 · App. 14/874,242 · Granted Sep 26, 2017

Circuit substrate for semiconductor package with multiple circuit substrate units and semiconductor package therefor

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Quick Facts
Patent No.
US 9,773,738
App. No.
14/874,242
Granted
Sep 26, 2017
Kind
B2
Abstract

Provided is a circuit substrate for a semiconductor package used for mounting a plurality of semiconductor devices. The circuit substrate including: a first circuit substrate unit; and a second circuit substrate unit that is formed on the first circuit substrate unit, wherein Young's modulus of a first dielectric material composing the dielectric layer of the first circuit substrate unit is higher than Young's modulus of a second dielectric material composing the dielectric layer of the second circuit substrate unit, and a coefficient of thermal expansion of the first dielectric material composing the dielectric layer of the first circuit substrate unit is smaller than a coefficient of thermal expansion of the second dielectric material composing the dielectric layer of the second circuit substrate unit.

Claims (59)

1. A circuit substrate for a semiconductor package used for mounting a plurality of semiconductor devices, the circuit substrate comprising:

a first circuit substrate unit that has a stacked structure of a dielectric layer and a conductor layer; and

a second circuit substrate unit that is formed on the first circuit substrate unit and has a stacked structure of a dielectric layer and a conductor layer,

wherein Young's modulus of a first dielectric material composing the dielectric layer of the first circuit substrate unit is higher than Young's modulus of a second dielectric material composing the dielectric layer of the second circuit substrate unit,

a coefficient of thermal expansion of the first dielectric material composing the dielectric layer of the first circuit substrate unit is smaller than a coefficient of thermal expansion of the second dielectric material composing the dielectric layer of the second circuit substrate unit,

the first circuit substrate unit has an area of a circuit formation larger than that of the second circuit substrate unit,

a plurality of electrodes used for mounting a semiconductor device are included on a surface of the second circuit substrate unit, and

a minimum line width of an electrical line embedded in the second circuit substrate unit is smaller than a minimum line width of an electrical line embedded in the first circuit substrate unit,

wherein the second dielectric material composing the dielectric layer of the second circuit substrate unit is an organic material,

wherein the first dielectric material composing the dielectric layer of the first circuit substrate unit is LTCC,

a third circuit substrate unit that has an area of a circuit formation to be larger than that of the second circuit substrate unit and to be equal to or less than an area of the first circuit substrate unit between the first circuit substrate unit and the second circuit substrate unit and has a stacked structure of a dielectric layer and a conductor layer, wherein a minimum line width of the third circuit substrate unit is larger than the minimum line width of the second circuit substrate unit and is smaller than the minimum line width of the first circuit substrate unit,

wherein one or more semiconductor devices are mounted on a surface of the second circuit substrate unit, and

one or more semiconductor devices are mounted on an outer periphery of an upper face of the third circuit substrate unit.

2. The circuit substrate for a semiconductor package according to claim 1 ,

wherein the Young's modulus and the coefficient of thermal expansion of the first dielectric material composing the dielectric layer of the first circuit substrate unit are respectively 80 to 200 GPa and 3 to 10 ppm/K, and

the Young's modulus and the coefficient of thermal expansion of the second dielectric material composing the dielectric layer of the second circuit substrate unit are respectively less than 10 GPa and 20 to 50 ppm/K.

3. The circuit substrate for a semiconductor package according to claim 1 ,

wherein the Young's modulus and the coefficient of thermal expansion of the first dielectric material composing the dielectric layer of the first circuit substrate unit are respectively 80 to 200 GPa and 3 to 10 ppm/K,

the Young's modulus and the coefficient of thermal expansion of the second dielectric material composing the dielectric layer of the second circuit substrate unit are respectively less than 10 GPa and 20 to 50 ppm/K, and

Young's modulus and a coefficient of thermal expansion of a third dielectric material composing the dielectric layer of the third circuit substrate unit are respectively less than 10 GPa and 20 to 50 ppm/K.

4. The circuit substrate for a semiconductor package according to claim 1 , wherein the third dielectric material composing the dielectric layer of the third circuit substrate unit is an organic material.

5. A semiconductor package comprising the circuit substrate for a semiconductor package according to claim 1 ,

wherein one or more semiconductor devices are mounted on a surface of the second circuit substrate unit, and

one or more bypass capacitors are mounted on an outer periphery of an upper face of the third circuit substrate unit.

6. A semiconductor package comprising the circuit substrate for a semiconductor package according to claim 1 , wherein one or more semiconductor devices are mounted on a surface of the second circuit substrate unit.

7. A semiconductor package comprising the circuit substrate for a semiconductor package according to claim 1 , wherein a minimum line width of an electrical line embedded in the second circuit substrate unit is 3 μm or less.

8. The semiconductor package comprising the circuit substrate for a semiconductor package according to claim 1 ,

wherein the second dielectric material composing the dielectric layer of the second circuit substrate unit is a cycloolefin polymer organic material.

9. The semiconductor package comprising the circuit substrate for a semiconductor package according to claim 6 , wherein said one or more semiconductor devices comprise a Central Processing Unit (CPU), a memory, an Application Specific Integrated Circuit (ASIC), or an optical integrated circuit (IC).

10. A circuit substrate for a semiconductor package used for mounting a plurality of semiconductor devices, the circuit substrate comprising:

a first circuit substrate unit that has a stacked structure of a dielectric layer and a conductor layer; and

a second circuit substrate unit that is formed on the first circuit substrate unit and has a stacked structure of a dielectric layer and a conductor layer,

wherein Young's modulus of a first dielectric material composing the dielectric layer of the first circuit substrate unit is higher than Young's modulus of a second dielectric material composing the dielectric layer of the second circuit substrate unit,

a coefficient of thermal expansion of the first dielectric material composing the dielectric layer of the first circuit substrate unit is smaller than a coefficient of thermal expansion of the second dielectric material composing the dielectric layer of the second circuit substrate unit,

the first circuit substrate unit has an area of a circuit formation larger than that of the second circuit substrate unit,

a plurality of electrodes used for mounting a semiconductor device are included on a surface of the second circuit substrate unit, and

a minimum line width of an electrical line embedded in the second circuit substrate unit is smaller than a minimum line width of an electrical line embedded in the first circuit substrate unit,

wherein the second dielectric material composing the dielectric layer of the second circuit substrate unit is an organic material,

wherein the first dielectric material composing the dielectric layer of the first circuit substrate unit is LTCC, and

wherein a minimum line width of an electrical line embedded in the second circuit substrate unit is 3 μm or less,

a third circuit substrate unit that has an area of a circuit formation to be larger than that of the second circuit substrate unit and to be equal to or less than an area of the first circuit substrate unit between the first circuit substrate unit and the second circuit substrate unit and has a stacked structure of a dielectric layer and a conductor layer,

wherein a minimum line width of the third circuit substrate unit is larger than the minimum line width of the second circuit substrate unit and is smaller than the minimum line width of the first circuit substrate unit,

wherein one or more semiconductor devices are mounted on a surface of the second circuit substrate unit, and

one or more semiconductor devices are mounted on an outer periphery of an upper face of the third circuit substrate unit.

11. The circuit substrate for a semiconductor package according to claim 10 ,

wherein the Young's modulus and the coefficient of thermal expansion of the first dielectric material composing the dielectric layer of the first circuit substrate unit are respectively 80 to 200 GPa and 3 to 10 ppm/K, and

the Young's modulus and the coefficient of thermal expansion of the second dielectric material composing the dielectric layer of the second circuit substrate unit are respectively less than 10 GPa and 20 to 50 ppm/K.

12. The circuit substrate for a semiconductor package according to claim 10 ,

wherein the Young's modulus and the coefficient of thermal expansion of the first dielectric material composing the dielectric layer of the first circuit substrate unit are respectively 80 to 200 GPa and 3 to 10 ppm/K,

the Young's modulus and the coefficient of thermal expansion of the second dielectric material composing the dielectric layer of the second circuit substrate unit are respectively less than 10 GPa and 20 to 50 ppm/K, and

Young's modulus and a coefficient of thermal expansion of a third dielectric material composing the dielectric layer of the third circuit substrate unit are respectively less than 10 GPa and 20 to 50 ppm/K.

13. The circuit substrate for a semiconductor package according to claim 10 , wherein the third dielectric material composing the dielectric layer of the third circuit substrate unit is an organic material.

14. The semiconductor package comprising the circuit substrate for a semiconductor package according to claim 10 ,

wherein one or more semiconductor devices are mounted on a surface of the second circuit substrate unit, and

one or more bypass capacitors are mounted on an outer periphery of an upper face of the third circuit substrate unit.

15. The semiconductor package comprising the circuit substrate for a semiconductor package according to claim 10 , wherein one or more semiconductor devices are mounted on a surface of the second circuit substrate unit.

16. The semiconductor package comprising the circuit substrate for a semiconductor package according to claim 10 ,

wherein the second dielectric material composing the dielectric layer of the second circuit substrate unit is a cycloolefin polymer organic material.

17. The semiconductor package comprising the circuit substrate for a semiconductor package according to claim 15 , wherein said one or more semiconductor devices comprise a Central Processing Unit (CPU), a memory, an Application Specific Integrated Circuit (ASIC), or an optical integrated circuit (IC).

Assignments (2)
CHANGE OF NAME Recorded Dec 27, 2023
From: HITACHI METALS, LTD.
To: PROTERIAL, LTD.
Reel/Frame 066130/0563 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 19, 2015
From: UEMATSU, YUTAKA; NAGATOMO, HIROYUKI; MASUKAWA, JUNICHI
To: HITACHI METALS, LTD.
Reel/Frame 037335/0468 →