Integrated circuits with contacts through a buried oxide layer and methods of producing the same
View Patent ↗Integrated circuits and methods of producing the same are provided. In an exemplary embodiment, an integrated circuit includes a substrate, where the substrate includes a buried oxide (BOX) layer positioned between a handle layer and a semiconductor layer. An electronic component overlies the buried oxide layer on a semiconductor layer side, and a gate line is electrically connected to the electronic component. A body line is also electrically connected to the electronic component. A first through BOX contact electrically connects the gate line with the handle layer, and a second through BOX contact electrically connects the body line with the handle layer.
1. An integrated circuit comprising:
a substrate comprising a handle layer, a buried oxide (BOX) layer, and a semiconductor layer, wherein the buried oxide layer is positioned between the handle layer and the semiconductor layer;
an electronic component overlying the buried oxide layer on a semiconductor layer side of the buried oxide layer;
a gate line electrically connected to the electronic component;
a body line electrically connected to the electronic component;
a first through BOX contact electrically connecting the gate line with the handle layer; and
a second through BOX contact electrically connecting the body line with the handle layer.
2. The integrated circuit of claim 1 further comprising:
a first shallow trench isolation structure within the semiconductor layer, wherein the first through BOX contact passes through the first shallow trench isolation structure.
3. The integrated circuit of claim 1 further comprising:
a second shallow trench isolation structure within the semiconductor layer, wherein the second through BOX contact passes through the second shallow trench isolation structure.
4. The integrated circuit of claim 1 further comprising:
a first diode, wherein the first diode is electrically connected between the gate line and the first through BOX contact.
5. The integrated circuit of claim 4 wherein a shallow trench isolation structure is positioned within the semiconductor layer between the first diode and the electronic component.
6. The integrated circuit of claim 4 wherein:
the first diode comprises a first diode N section electrically connected to the gate line;
the first diode comprises a first diode P section electrically connected to the handle layer, and wherein the first diode N section physically contacts the first diode P section.
7. The integrated circuit of claim 1 further comprising:
A second diode, wherein the second diode is electrically connected between the body line and the second through BOX contact.
8. The integrated circuit of claim 7 wherein a shallow trench isolation structure is positioned within the semiconductor layer between the second diode and the electronic component.
9. The integrated circuit of claim 7 wherein:
the second diode comprises a second diode N section electrically connected to the body line; and
the second diode comprises a second diode P section electrically connected to the handle layer, and wherein the second diode P section physically contacts the second diode N section.
10. The integrated circuit of claim 1 wherein the first through BOX contact is electrically isolated from the second through BOX contact.
11. The integrated circuit of claim 1 wherein the handle layer has a resistivity of about 1,000 ohm centimeters or greater.
12. The integrated circuit of claim 1 further comprising:
a handle layer diode within the handle layer, wherein the handle layer diode is positioned within the handle layer, and wherein the handle layer diode is electrically connected to at least one of the first through BOX contact and the second through BOX contact.
13. The integrated circuit of claim 1 wherein the first through BOX contact and the second through BOX contact are about 10 micrometers or more apart.
14. The integrated circuit of claim 1 wherein the electronic component comprises a planar transistor.
15. The integrated circuit of claim 1 wherein:
the electronic component comprises a transistor, wherein the transistor comprises a gate and a body, and wherein the body comprises a source and a drain.
16. The integrated circuit of claim 15 wherein:
the gate is electrically connected to the gate line; and
the body is electrically connected to the body line.
17. An integrated circuit comprising:
a substrate comprising a handle layer, a buried oxide layer, and a semiconductor layer, wherein the buried oxide layer is positioned between the handle layer and the semiconductor layer;
a transistor overlying the buried oxide layer on a semiconductor layer side of the buried oxide layer, wherein the transistor comprises a gate and a body; and
a plurality of through BOX contacts in electrical communication with the handle layer and the transistor.
18. The integrated circuit of claim 17 wherein the handle layer comprises a resistivity of about 1,000 ohm centimeters or greater.
19. The integrated circuit of claim 17 wherein the transistor comprises a planar transistor.
20. A method of producing an integrated circuit comprising:
forming an electronic component overlying a buried oxide layer of a substrate, wherein the substrate comprises a handle layer and a semiconductor layer on opposite sides of the buried oxide layer, and wherein the electronic component is formed on a semiconductor layer side of the buried oxide layer;
forming a gate line electrically connected to the electronic component;
forming a body line electrically connected to the electronic component;
forming a first through BOX contact electrically connecting the gate line with the handle layer; and
forming a second through BOX contact electrically connecting the body line with the handle layer.