Low power embedded one-time programmable (OTP) structures

1. A method for forming a device comprising:

providing a substrate prepared with at least a first region for accommodating an anti-fuse based memory cell;

forming a fin structure in the first region, the fin structure comprises top and bottom fin portions and comprises channel and non-channel regions defined along the length of the top fin portion;

forming an isolation layer on the substrate, wherein the isolation layer has a top isolation surface disposed below a top fin surface, leaving the top fin portion exposed;

performing one or more etch processes on at least a portion of the exposed top fin portion to form a sharpened tip profile in at least the channel region of the fin structure, wherein the sharpened tip profile is defined by the one or more etch processes; and

forming a gate having a gate dielectric and a metal gate electrode over the substrate, wherein the gate wraps around the channel region of the fin structure, and the gate dielectric covers the sharpened tip profile of the fin structure.

2. The method of claim 1 wherein the one or more etch processes etches the exposed top fin portion more rapidly along a first crystallographic direction relative to a second crystallographic direction to form the sharpened tip profile.

3. The method of claim 1 wherein the one or more etch processes are performed on the entire exposed top fin portion to form the sharpened tip profile in the channel and non-channel regions of the fin structure.

4. The method of claim 1 comprising forming a dielectric layer to cover the exposed top fin portion prior to performing the one or more etch processes, wherein the dielectric layer is processed to selectively expose an upper portion of the top fin portion corresponding to the channel region of the fin structure, wherein the one or more etch processes are performed on the exposed upper portion of the top fin portion to form the sharpened tip profile.

5. The method of claim 1 wherein the sharpened tip profile is formed throughout the length of the top fin portion and the fin structure is processed to form a nanowire having the sharpened tip profile.

6. A method for forming a device comprising:

providing a substrate prepared with a first region for accommodating an anti-fuse based memory cell and a second region for accommodating a logic transistor;

forming fin structures in the first and second regions, wherein each of the fin structures comprises top and bottom fin portions and comprises channel and non-channel regions defined along the length of the top fin portion;

forming an isolation layer on the substrate, wherein the isolation layer has a top isolation surface disposed below a top fin surface, leaving the top fin portion of the fin structures exposed;

processing at least the exposed top fin portion of the fin structure in the first region to simultaneously form a sharpened tip profile in the channel and non-channel regions of the fin structure in the first region, wherein the sharpened tip profile extends continuously throughout the top fin portion of the fin structure in the first region; and

forming a gate dielectric layer and a metal gate electrode layer over the substrate to form gates in the first and second regions, wherein the gate dielectric layer wraps around the channel region of the fin structures in the first and second regions, wherein the gate dielectric layer covers the sharpened tip profile of the fin structure in the first region.

7. The method of claim 6 comprising processing the non-channel region of the fin structure in the first region to form one or more heavily doped contact regions having the sharpened tip profile.

8. The method of claim 6 comprising forming a dummy gate covering the channel region of the fin structure in the second region prior to processing the exposed top fin portion of the fin structure in the first region.

9. The method of claim 8 wherein processing at least the exposed top fin portion of the fin structure in the first region comprises forming an epitaxial layer on the top fin portion of the fin structures in the first and second regions, wherein the epitaxial layer forms raised top fin portions having a faceted cross-section on the channel and non-channel regions of the fin structure in the first region, wherein the raised top fin portions define the sharpened tip profile of the fin structure in the first region.

10. The method of claim 9 wherein the epitaxial layer forms the raised top fin portions having the faceted cross-section in the non-channel region of the fin structure in the second region.

11. The method of claim 10 comprising processing the raised top fin portions in the non-channel region of the fin structure in the second region to form raised source/drain regions having the sharpened tip profile, wherein the channel region of the fin structure in the second region includes a substantially planar surface profile.

12. The method of claim 6 wherein processing the exposed top fin portion of the fin structure in the first region simultaneously processes the exposed top fin portion of the fin structure in the second region to form the sharpened tip profile in at least the non-channel region of the fin structure in the second region.

13. The method of claim 12 wherein processing the top fin portions of the fin structures in the first and second regions comprises forming an epitaxial layer to form raised top fin portions having a faceted cross-section on at least the entire top fin portion of the fin structure in the first region, wherein the raised top fin portions define the sharpened tip profile in the channel and non-channel regions of the fin structure in the first region.

14. The method of claim 13 wherein forming the epitaxial layer simultaneously forms the raised top fin portions having the faceted cross-section on at least a portion of the top fin portion of the fin structure in the second region, wherein the raised top fin portions are disposed in the non-channel region and define the sharpened tip profile of the fin structure in the second region.

15. The method of claim 14 wherein the channel region of the fin structure in the second region includes a substantially planar surface profile.

16. The method of claim 13 wherein forming the epitaxial layer simultaneously forms the raised top fin portions having the faceted cross-section on the entire top fin portion of the fin structure in the second region, wherein the raised top fin portions are disposed in the channel and non-channel regions of the fin structure in the second region.

17. The method of claim 16 comprising processing the raised top fin portions disposed in the non-channel region of the fin structure in the first region to form one or more heavily doped contact regions having the sharpened tip profile.

18. The method of claim 16 comprising processing the raised top fin portions disposed in the non-channel region of the fin structure in the second region to form raised source/drain regions having the sharpened tip profile.

19. The method of claim 6 wherein processing at least the exposed top fin portion of the fin structure in the first region comprises performing one or more etch processes on the entire top fin portion of the fin structure in the first region.

20. The method of claim 19 wherein the one or more etch processes etches the top fin portion more rapidly along a first crystallographic direction relative to a second crystallographic direction to define the sharpened tip profile of the fin structure in the first region.