Semiconductor device having a polarization super junction field effect transistor, electric equipment, bidirectional field effect transistor, and mounted structure body having the same
Provided are a semiconductor device and a bidirectional field effect transistor which can easily overcome the tradeoff relation between the high voltage resistance and high speed in the semiconductor device using a polarization super junction, realize both the high voltage resistance and elimination of the occurrence of current collapse, operate at a high speed, and further the loss is low. The semiconductor device comprises a polarization super junction region and a p-electrode contact region. The polarization super junction region comprises an undoped GaN layer 11 , an undoped Al x Ga 1-x N layer 12 with a thickness not smaller than 25 nm and not larger than 47 nm and 0.17≤x≤0.35, an undoped GaN layer 13 and a p-type GaN layer 14 . When the reduced thickness tR is defined as tR=u+v(1+w×10 −18 ) for the thickness u [nm] of the undoped GaN layer 13 , the thickness v [nm] and the Mg concentration w [cm −3 ] of the p-type GaN layer 14 , tR≥0.864/(x−0.134)+46.0 [nm] is satisfied. The p-electrode contact region comprises a p-type GaN contact layer formed to be in contact with the p-type GaN layer 14 and a p-electrode that is in contact with the p-type GaN contact layer.
1. A semiconductor device, comprising:
a polarization super junction region and a p-electrode contact region which are separated from each other,
the polarization super junction region, comprising:
a first undoped GaN layer,
an undoped Al x Ga 1-x N layer (0.17≤x≤0.35) with a thickness not smaller than 25 nm and not larger than 47 nm on the first undoped GaN layer,
a second undoped GaN layer on the undoped layer; and
a Mg-doped p-type GaN layer on the second undoped GaN layer,
tR≥ 0.864/( x− 0.134)+46.0 [nm]
being satisfied when the thickness of the second undoped GaN layer is denoted as u[nm], the thickness of the p-type GaN layer is denoted as v[nm], the Mg concentration of the p-type GaN layer is denoted as w [cm −3 ] and the reduced thickness tR is defined as
tR=u+v (1+ w× 10 −18 ),
wherein the thickness of the p-type GaN layer v [nm]≤20 [nm] and the Mg concentration of the p-type GaN layer w[cm −3 ]≤5×10 18 [cm −3 ],
the p-electrode contact region, comprising:
a p-type GaN contact layer which is doped with Mg heavier than the p-type GaN layer, provided in contact with the p-type GaN layer only in the p-electrode contact region; and
a p-electrode which is in ohmic contact with the p-type GaN contact layer,
a two-dimensional hole gas being formed in the second undoped GaN layer in the vicinity part of a hetero-interface between the undoped Al x Ga 1-x N layer and the second undoped GaN layer, and a two-dimensional electron gas being formed in the first undoped GaN layer in the vicinity part of a hetero-interface between the first undoped GaN layer and the undoped Al x Ga 1-x N layer at a non-operating time.
2. The semiconductor device according to claim 1 wherein the p-type GaN contact layer is formed on the p-type GaN layer as a mesa.
3. The semiconductor device according to claim 2 wherein the semiconductor device is a field effect transistor, and the second undoped GaN layer and the p-type GaN layer on the undoped Al x Ga 1-x N layer are patterned as a mesa, the p-type GaN contact layer is formed on the p-type GaN layer as a mesa, a source electrode and a drain electrode are formed on the undoped Al x Ga 1-x N layer so as to sandwich the second undoped GaN layer and the p-type GaN layer, and the p-electrode serving also as a gate electrode is formed on the p-type GaN contact layer.