IP Library › Granted Patent US 10,566,140
Granted Patent B2
US 10,566,140 · App. 14/904,855 · Granted Feb 18, 2020

DVC utilizing MEMS resistive switches and MIM capacitors

Inventors: Richard L. Knipe (McKinney, TX); Charles G. Smith (Cambridge, NL); Roberto Gaddi (s-Hertogenbosch, NL); Robertus Petrus Van Kampen (S-Hertogenbosch, NL)
Assignee: CAVENDISH KINETICS, INC.
H01G5/40H01G5/16H01G5/18H01G5/38H01H59/0009H01L28/20H01L28/40
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,566,140
App. No.
14/904,855
Granted
Feb 18, 2020
Kind
B2
Abstract

The present invention generally relates to a MEMS DVC utilizing one or more MIM capacitors. The MIM capacitor may be disposed between the MEMS device and the RF pad or the MIM capacitor may be integrated into the MEMS device itself. The MIM capacitor ensures that a low resistance for the MEMS DVC is achieved.

Claims (33)

1. A MEMS DVC, comprising:

a substrate;

a plurality of pull-in electrodes disposed in the substrate;

a plurality of pull-up electrodes disposed on an insulating layer;

a conducting post disposed above a RF line, wherein a top surface of the conducting post is a metal material;

a MEMS bridge device, wherein the MEMS bridge device has a upper layer and a lower layer coupled together by a conducting material, wherein the MEMS bridge device is movable, wherein the RF line and conducting post form a MIM capacitor, wherein the MIM capacitor contacts the MEMS bridge device through a window when the MEMS bridge device is in a lower positon; and

bumps disposed on a layer that is disposed on and above the plurality of pull-in electrodes, wherein the MEMS bridge device contacts the bumps when the MEMS bridge is in a lower position, wherein the bumps are disposed between the MIM capacitor and a via.

2. The MEMS DVC of claim 1 , wherein the MIM capacitor comprises the RF line, a first electrically conductive layer, an electrically insulating layer disposed on the RF line first electrically conductive layer, and a second electrically conductive layer disposed on the electrically insulating layer.

3. A method of making a MEMS DVC, comprising:

depositing a RF pad over a substrate;

forming a plurality of pull-in electrodes in the substrate;

forming a plurality of pull-up electrodes on an insulating layer;

forming a conducting post above a RF line, wherein a top surface the conducting post is a metal material;

forming bumps on a layer that is disposed on and above the plurality of pull-in electrodes; and

forming a MEMS bridge device, wherein the MEMS bridge device has a upper layer and a lower layer coupled together by a conducting material, wherein the MEMS bridge device is movable, wherein the RF line and conducting post form a MIM capacitor substrate, wherein the MIM capacitor is electrically coupled to an RF electrode, wherein the MIM capacitor contacts the MEMS bridge device through a window when the MEMS bridge device is in a lower positon, wherein the MEMS bridge device contacts the bumps when the MEMS bridge is in a lower position, wherein the bumps are disposed between the MIM capacitor and a via.

4. The method of claim 3 , wherein the MIM capacitor is formed by a method that comprises:

depositing a first electrically conductive layer over the substrate;

depositing a first electrically insulating layer over the first electrically conductive layer; and

depositing a second electrically conductive layer over the first electrically insulating layer.

5. The method of claim 4 , wherein the first electrically conductive layer comprises the RF line.

6. A method of making a MEMS DVC, comprising:

depositing a RF pad over a substrate;

forming a MEMS device within a cavity, the forming comprising:

forming a MIM capacitor over the substrate, wherein the MIM capacitor is coupled to the RF pad; and

forming one or more switching elements over the substrate, wherein the one or more switching elements are movable from a position in electrical contact with the MIM capacitor and a position spaced from the MIM capacitor; and

forming a variable resistor connecting the MIM capacitor to a reference potential, further comprising setting the value of the variable resistor based upon the following logic:

when the switching element is in an UP or DOWN position, the variable resistor will normally be set to its highest value so that the current flowing in the variable resistor will be significantly lower than the coupling between the switching element and the MIM capacitor; and

when the position of the switching element is changed from the DOWN to the UP position or from the UP to the DOWN position, the variable resistor will temporarily be set to its lowest value until the state transition is completed.

7. The method of claim 6 , wherein the MIM capacitor is formed by a method that comprises:

depositing a first electrically conductive layer over the substrate;

depositing a first electrically insulating layer over the first electrically conductive layer; and

depositing a second electrically conductive layer over the first electrically insulating layer.

8. The method of claim 7 , wherein the first electrically conductive layer comprises the RF line.

Assignments (2)
PLAN OF DISSOLUTION OF CAVENDISH KINETICS INC. Recorded Feb 10, 2022
From: CAVENDISH KINETICS INC.
To: QORVO US, INC.
Reel/Frame 059113/0181 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 29, 2016
From: KNIPE, RICHARD L.; SMITH, CHARLES G.; GADDI, ROBERTO; VAN KAMPEN, ROBERTUS PETRUS
To: CAVENDISH KINETICS, INC.
Reel/Frame 038122/0987 →
Continuity (2)
Provisional Application 61861326 · Aug 1, 2013
Related Publication 20160172112A1 · Jun 16, 2016