IP Library Granted Patent US 9,628,057
Granted Patent B2
US 9,628,057 · App. 14/909,212 · Granted Apr 18, 2017

Spread-spectrum clock generation circuit, integrated circuit and apparatus therefor

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,628,057
App. No.
14/909,212
Granted
Apr 18, 2017
Kind
B2
Abstract

A spread-spectrum clock generation circuit comprises at least one comparison element; at least one charge storage device arranged to couple an output of the at least one comparison element to an input of the at least one comparison element and arranged to set a first oscillation frequency of the spread-spectrum clock generation circuit; and a switched charge storage arrangement additionally arranged to couple an output of the at least one comparison element to an input of the at least one comparison element and arranged to set a second oscillation frequency of the spread-spectrum clock generation circuit.

Claims (33)

1. A spread-spectrum clock generation circuit comprising:

at least one comparison element;

a shunt charge storage device operably coupled to the at least one comparison element and arranged to limit a voltage applied thereto;

at least one charge storage device arranged to couple an output of the at least one comparison element to an input of the at least one comparison element and arranged to set a first oscillation frequency of the spread-spectrum clock generation circuit; and

a switched charge storage arrangement additionally arranged to couple an output of the at least one comparison element to an input of the at least one comparison element and arranged to set a second oscillation frequency of the spread-spectrum clock generation circuit.

2. The spread-spectrum clock generation circuit of claim 1 wherein the charge storage device is at least one feedback capacitor.

3. The spread-spectrum clock generation circuit of claim 1 wherein the switched charge storage arrangement comprises a plurality of individually switchable charge storage devices.

4. The spread-spectrum clock generation circuit of claim 3 wherein a number of the plurality of individually switchable charge storage devices are dynamically selected thereby altering a switching frequency of the spread-spectrum clock generation circuit.

5. The spread-spectrum clock generation circuit of claim 3 wherein the plurality of individually switchable charge storage devices are operably coupled to a switching arrangement for selectively applying a number of the individually switchable charge storage devices to be located in parallel to the feedback capacitor.

6. The spread-spectrum clock generation circuit of claim 3 wherein a number of the plurality of individually switchable charge storage devices sets at least one from a group comprising:

a frequency modulation of the oscillation frequency of the spread-spectrum clock generation circuit;

a frequency spreading of the oscillation frequency of the spread-spectrum clock generation circuit;

a dithering of the oscillation frequency of the spread-spectrum clock generation circuit.

7. The spread-spectrum clock generation circuit of claim 3 , wherein the individually switchable charge storage devices are selected in an asynchronous manner.

8. The spread-spectrum clock generation circuit of claim 2 wherein the at least one feedback capacitor sets a maximum oscillation frequency of the spread-spectrum clock generation circuit when no individually switchable charge storage device is applied in parallel.

9. The spread-spectrum clock generation circuit of claim 1 wherein selection of an individually switchable charge storage device of the switched charge storage arrangement together with the at least one charge storage device sets a range of oscillation frequencies of the spread-spectrum clock generation circuit.

10. The spread-spectrum clock generation circuit of claim 3 wherein a minimum oscillation frequency of the spread-spectrum clock generation circuit is set when each of the individually switchable charge storage devices is applied.

11. The spread-spectrum clock generation circuit of claim 3 wherein the plurality of individually switchable charge storage devices form a weighted capacitor array.

12. The spread-spectrum clock generation circuit of claim 2 , wherein the switched charge storage arrangement comprises a capacitive ladder network arranged to represent the individually switchable charge storage devices.

13. The spread-spectrum clock generation circuit of claim 12 , wherein the capacitive ladder network comprises a plurality of individually switchable capacitor arrays.

14. The spread-spectrum clock generation circuit of claim 3 , wherein a number of the plurality of individually switchable charge storage devices that are applied in parallel sets a clock-frequency spreading bandwidth of the spread-spectrum clock generation circuit.

15. The spread-spectrum clock generation circuit of claim 1 , wherein the comparison element is a single threshold comparator.

16. An integrated circuit comprising the spread-spectrum clock generation circuit according to claim 1 .

17. A spread-spectrum clock generation circuit comprising:

at least one comparison element;

at least one charge storage device arranged to couple an output of the at least one comparison element to an input of the at least one comparison element and arranged to set a first oscillation frequency of the spread-spectrum clock generation circuit; and

a switched charge storage arrangement additionally arranged to couple an output of the at least one comparison element to an input of the at least one comparison element and arranged to set a second oscillation frequency of the spread-spectrum clock generation circuit, wherein the switched charge storage arrangement comprises a plurality of individually switchable charge storage devices, and wherein the number of individually switchable charge storage devices is controlled by at least one from a group comprising: a programmable pseudo-random-number generator, a linear feedback shift register.

18. An apparatus comprising an oscillator circuit having:

at least one comparison element;

a shunt charge storage device operably coupled to the at least one comparison element and arranged to limit a voltage applied thereto;

at least one charge storage device arranged to couple an output of the at least one comparison element to an input of the at least one comparison element and arranged to set a first oscillation frequency of the spread-spectrum clock generation circuit; and

a switched charge storage arrangement additionally arranged to couple an output of the at least one comparison element to an input of the at least one comparison element and arranged to set a second oscillation frequency of the spread-spectrum clock generation circuit.

19. The apparatus of claim 18 wherein the apparatus is a switched-mode power supply or a synchronous digital system.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040626 FRAME: 0683. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME EFFECTIVE NOVEMBER 7, 2016. Recorded Jan 12, 2017
From: NXP SEMICONDUCTORS USA, INC. (MERGED INTO); FREESCALE SEMICONDUCTOR, INC. (UNDER)
To: NXP USA, INC.
Reel/Frame 041414/0883 →
CHANGE OF NAME Recorded Nov 16, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040626/0683 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2016
From: SHUVALOV, DENIS SERGEEVICH
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037631/0846 →