Amplifier adapted for noise suppression
An amplifier ( 100 ) adapted for noise suppression comprises a first input ( 102 ) for receiving a first input signal and a second input ( 104 ) for receiving a second input signal, the first and second input signals constituting a differential pair. A first output ( 106 ) delivers a first output signal and a second output ( 108 ) delivers a second output signal, the first and second output signals constituting a differential pair. A first transistor (M CG1 ) has a first drain ( 110 ) coupled to the first output ( 106 ) such that all signal current, except parasitic losses, flowing through the first drain ( 110 ) flows through the first output ( 106 ), and the first transistor (M CG1 ) further having a first source ( 112 ) coupled to the first input ( 102 ). A second transistor (M CS1 ) has a second gate ( 116 ) coupled to the first input ( 102 ), a second drain ( 118 ) coupled to the second output ( 108 ) such that all signal current, except parasitic losses, flowing through the second drain ( 118 ) flows through the second output ( 108 ), and the second transistor (M CS1 ) further having a second source ( 120 ) coupled to a first voltage rail ( 122 ). A third transistor (M CS2 ) has a third gate ( 124 ) coupled to the second input ( 104 ), a third drain ( 126 ) coupled to the first output ( 106 ) such that all signal current, except parasitic losses, flowing through the third drain ( 126 ) flows through the first output ( 106 ), and the third transistor (M CS2 ) further having a third source ( 128 ) coupled to the first voltage rail ( 122 ). A fourth transistor (M CG2 ) has a fourth drain ( 130 ) coupled to the second output ( 108 ) such that all signal current, except parasitic losses, flowing through the fourth drain ( 130 ) flows through the second output ( 108 ), and the fourth transistor (M CG2 ) further having a fourth source ( 132 ) coupled to the second input ( 104 ). A first load (Z L1 ) is coupled between the first output ( 106 ) and a second voltage rail ( 136 ). A second load (Z L2 ) is coupled between the second output ( 108 ) and the second voltage rail ( 136 ). A first inductive element (L 1 ) is coupled between the first input ( 102 ) and a third voltage rail ( 138 ), and a second inductive element (L 2 ) is coupled between the second input ( 104 ) and the third voltage rail ( 138 ). Transconductance of the first transistor (M CG1 ) is substantially equal to transconductance of the fourth transistor (M CG2 ), within ±5%, and transconductance of the second transistor (M CS1 ) is substantially equal to transconductance of the third transistor (M CS2 ), within ±5%.
1. An amplifier adapted for noise suppression, the amplifier comprising:
a first input for receiving a first input signal and a second input for receiving a second input signal, the first and second input signals constituting a differential pair;
a first output for delivering a first output signal and a second output for delivering a second output signal, the first and second output signals constituting a differential pair;
a first transistor having:
a first drain coupled to the first output such that all signal current, except parasitic losses, flowing through the first drain flows through the first output; and
a first source coupled to the first input;
a second transistor having:
a second gate coupled to the first input;
a second drain coupled to the second output such that all signal current, except parasitic losses, flowing through the second drain flows through the second output; and
a second source coupled to a first voltage rail;
a third transistor having:
a third gate coupled to the second input;
a third drain coupled to the first output such that all signal current, except parasitic losses, flowing through the third drain flows through the first output; and
a third source coupled to the first voltage rail;
a fourth transistor having:
a fourth drain coupled to the second output such that all signal current, except parasitic losses, flowing through the fourth drain flows through the second output; and
a fourth source coupled to the second input;
a first load coupled between the first output and a second voltage rail;
a second load coupled between the second output and the second voltage rail;
a first inductive element coupled between the first input and a third voltage rail; and
a second inductive element coupled between the second input and the third voltage rail;
wherein transconductance of the first transistor is substantially equal to transconductance of the fourth transistor within ±5%; and
wherein transconductance of the second transistor is substantially equal to transconductance of the third transistor within ±5%;
wherein:
the transconductance of the second transistor exceeds the transconductance of the first transistor; and
the transconductance of the third transistor exceeds the transconductance of the fourth transistor.
2. The amplifier of claim 1 , wherein:
first transistor has a first gate coupled to a bias voltage rail; and
the fourth transistor has a fourth gate coupled to the bias voltage rail.
3. The amplifier of claim 1 , wherein:
first transistor has a first gate coupled to the second input; and
the fourth transistor has a fourth gate coupled to the first input.
4. The amplifier of claim 1 , wherein:
the transconductance of the first transistor is equal to the transconductance of the fourth transistor; and
the transconductance of the second transistor is equal to the transconductance of the third transistor.
5. The amplifier of claim 1 , wherein:
the transconductance of the second transistor is less than five times the transconductance of the first transistor; and
the transconductance of the third transistor is less than five times the transconductance of the fourth transistor.
6. The amplifier of claim 5 , wherein:
the transconductance of the second transistor is twice the transconductance of the first transistor; and
the transconductance of the third transistor is twice the transconductance of the fourth transistor.
7. The amplifier of claim 5 , wherein:
the transconductance of the second transistor is three times the transconductance of the first transistor; and
the transconductance of the third transistor is three times the transconductance of the fourth transistor.
8. The amplifier of claim 1 , wherein the transconductance of the first transistor is 0.02 siemens.
9. A receiving apparatus, comprising:
an amplifier;
wherein the amplifier comprises:
a first input for receiving a first input signal and a second input for receiving a second input signal, the first and second input signals constituting a differential pair;
a first output for delivering a first output signal and a second output for delivering a second output signal, the first and second output signals constituting a differential pair;
a first transistor having:
a first drain coupled to the first output such that all signal current, except parasitic losses, flowing through the first drain flows through the first output; and
a first source coupled to the first input;
a second transistor having:
a second gate coupled to the first input;
a second drain coupled to the second output such that all signal current, except parasitic losses, flowing through the second drain flows through the second output; and
a second source coupled to a first voltage rail;
a third transistor having:
a third gate coupled to the second input;
a third drain coupled to the first output such that all signal current, except parasitic losses, flowing through the third drain flows through the first output; and
a third source coupled to the first voltage rail;
a fourth transistor having:
a fourth drain coupled to the second output such that all signal current, except parasitic losses, flowing through the fourth drain flows through the second output; and
a fourth source coupled to the second input;
a first load coupled between the first output and a second voltage rail;
a second load coupled between the second output and the second voltage rail;
a first inductive element coupled between the first input and a third voltage rail; and
a second inductive element coupled between the second input and the third voltage rail;
wherein transconductance of the first transistor is substantially equal to transconductance of the fourth transistor within ±5%; and
wherein transconductance of the second transistor is substantially equal to transconductance of the third transistor within ±5%;
wherein:
the transconductance of the second transistor exceeds the transconductance of the first transistor; and
the transconductance of the third transistor exceeds the transconductance of the fourth transistor.
10. The receiving apparatus of claim 9 :
further comprising a balun and a mixer:
wherein the first input and the second input are coupled to a differential output of the balun; and
wherein the first output and the second output are coupled to a differential input of the mixer.
11. The receiving apparatus of claim 10 , further comprising an antenna coupled to a single-ended input of the balun.
12. A mobile communication device, comprising
a receiving apparatus comprising an amplifier; wherein the amplifier comprises:
a first input for receiving a first input signal and a second input for receiving a second input signal, the first and second input signals constituting a differential pair;
a first output for delivering a first output signal and a second output for delivering a second output signal, the first and second output signals constituting a differential pair;
a first transistor having:
a first drain coupled to the first output such that all signal current, except parasitic losses, flowing through the first drain flows through the first output; and
a first source coupled to the first input;
a second transistor having:
a second gate coupled to the first input;
a second drain coupled to the second output such that all signal current, except parasitic losses, flowing through the second drain flows through the second output; and
a second source coupled to a first voltage rail;
a third transistor having:
a third gate coupled to the second input;
a third drain coupled to the first output such that all signal current, except parasitic losses, flowing through the third drain flows through the first output; and
a third source coupled to the first voltage rail;
a fourth transistor having:
a fourth drain coupled to the second output such that all signal current, except parasitic losses, flowing through the fourth drain flows through the second output; and
a fourth source coupled to the second input;
a first load coupled between the first output and a second voltage rail;
a second load coupled between the second output and the second voltage rail;
a first inductive element coupled between the first input and a third voltage rail; and
a second inductive element coupled between the second input and the third voltage rail;
wherein transconductance of the first transistor is substantially equal to transconductance of the fourth transistor within ±5%; and
wherein transconductance of the second transistor is substantially equal to transconductance of the third transistor within ±5%;
wherein:
the transconductance of the second transistor exceeds the transconductance of the first transistor; and
the transconductance of the third transistor exceeds the transconductance of the fourth transistor.
13. The amplifier of claim 1 , wherein the amplifier is an amplifier whose differential input voltage produces a differential output current.
14. The amplifier of claim 1 , wherein the amplifier functions as a low noise amplifier (LNA) of a radio frequency (RF) receiver.