Method and apparatus to manage the direct interconnect switch wiring and growth in computer networks
The present invention provides a method for managing the wiring and growth of a direct interconnect network implemented on a torus or higher radix interconnect structure based on an architecture that replaces the Network Interface Card (NIC) with PCIe switching cards housed in the server. Also provided is a passive patch panel for use in the implementation of the interconnect, comprising: a passive backplane that houses node to node connectivity for the interconnect; and at least one connector board plugged into the passive backplane comprising multiple connectors. The multiple connectors are capable of receiving an interconnecting plug to maintain the continuity of the torus or higher radix topology when not fully enabled. The PCIe card for use in the implementation of the interconnect comprises: at least 4 electrical or optical ports for the interconnect; a local switch; a processor with RAM and ROM memory; and a PCI interface.
1. A passive patch panel for use in the implementation of a torus or higher radix interconnect, comprising:
a passive printed circuit board that houses node to node connectivity for the torus or higher radix interconnect; and
at least one connector board plugged into the passive printed circuit board comprising multiple connectors, wherein said multiple connectors comprise fields of multiple connectors, namely:
a main field of connectors for implementing a 2D torus interconnect network;
a second field of connectors to allow for expansion of the network to a 3D torus interconnect network;
and a third field of connectors to allow for expansion of the network to a 4D torus interconnect network; and
wherein each of said connectors is initially populated by an interconnecting plug to initially close one or more connections of the torus or higher radix interconnect, and wherein each of said plugs is capable of being replaced by a cable attached to a Peripheral Component Interconnect Express (PCIe) card from a server to build an interconnect network.
2. The passive patch panel of claim 1 wherein the main field comprises 42 connectors in a 7×6 torus configuration, the second field comprises 12 connectors in 2 groups of 6, and the third field comprises 12 connectors in 2 groups of 6.
3. The passive patch panel of claim 1 wherein the printed circuit board includes unpowered electronic devices using a passive resistor combination attached to every connector, and wherein when a plug populating a connector is replaced by a cable attached to a Peripheral Component Interconnect Express (PCIe) card the device attached to the connector is interrogated by software running on the PCIe card in order to obtain an ID of the connector.
4. A passive patch panel for use in the implementation of a torus or higher radix interconnect, comprising:
a passive printed circuit board that houses node to node connectivity for the torus or higher radix interconnect; and
at least one connector board plugged into the passive printed circuit board comprising multiple connectors, wherein said multiple connectors comprise fields of multiple connectors, namely:
a main field of connectors for implementing a torus interconnect network in N dimensions;
a second field of connectors for expanding the network to a N+1 dimension torus interconnect network; and
a third field of connectors for expanding the network to a N+2 dimension torus interconnect network; and
wherein N is at least 3;
and wherein each of said connectors is initially populated by an interconnecting plug to initially close one or more connections of the torus or higher radix interconnect, and wherein each of said plugs is capable of being replaced by a cable attached to a Peripheral Component Interconnect Express (PCIe) card from a server to build an interconnect network.
5. The passive patch panel of claim 4 wherein the printed circuit board includes unpowered electronic devices using a passive resistor combination attached to every connector, and wherein when a plug populating a connector is replaced by a cable attached to a Peripheral Component Interconnect Express (PCIe) card the device attached to the connector is interrogated by software running on the PCIe card in order to obtain an ID of the connector.
6. The passive patch panel of claim 1 wherein the at least one connector board plugged into the passive printed circuit board with multiple connectors is used to increase a number of servers that may be used in a rack, wherein the printed circuit board is plugged via high capacity connectors to a backplane to provide connectivity to the connector board, and wherein high capacity connectors on the board may be used to patch panels rack to rack.
7. A method for reducing deployment complexity and promoting wiring simplification when adding new servers in a direct interconnect network without impacting an existing implementation of the network comprising the steps of:
populating connectors interconnected in a passive printed circuit board housed by a passive patch panel with interconnect plugs that initially close one or more connections of the network, said connectors comprising:
a main field of connectors for implementing a 2D torus interconnect network;
a second field of connectors for expanding the network to a 3D torus interconnect network; and
a third field of connectors for expanding the network to a 4D torus interconnect network;
replacing each of said interconnect plugs with a connecting cable attached to a Peripheral Component Interconnect Express (PCIe) card housed in a server to add said server to the interconnect network;
discovering connectivity of the server to the interconnect network; and
discovering topology of the interconnect network based on the server added to the interconnect network.
8. The method of claim 7 wherein the main field comprises 42 connectors in a 7×6 torus configuration, the second field comprises 12 connectors in 2 groups of 6, and the third field comprises 12 connectors in 2 groups of 6.
9. A method for reducing deployment complexity and promoting wiring simplification when adding new servers in a direct interconnect network without impacting an existing implementation of the network comprising the steps of:
populating connectors interconnected in a passive printed circuit board housed by a passive patch panel with interconnect plugs that initially close one or more connections of the network, said connectors comprising:
a main field of connectors for implementing a torus interconnect network in N dimensions;
a second field of connectors for expanding the network to a N+1 dimension torus interconnect network; and
a third field of connectors for expanding the network to a N+2 dimension torus interconnect network; and
wherein N is at least 3,
replacing each of said interconnect plugs with a connecting cable attached to a Peripheral Component Interconnect Express (PCIe) card housed in a server to add said server to the interconnect network;
discovering connectivity of the server to the interconnect network; and
discovering topology of the interconnect network based on the server added to the interconnect network.