Transmission device
A transmission device to multiplex in a first signal a plurality of second signals each having a low rate as compared with the first signal, the transmission device includes: a plurality of memories to store the plurality of second signals; a selector to select one of the second signals read from the plurality of memories; and a controller to control read timing to read the plurality of second signals from the plurality of memories and signal selection timing to select the one of the second signals by the selector so as to execute rearrangement processing of the plurality of second signals read from the plurality of memories in accordance with cross-connect setting information for the plurality of second signals and shift processing of the plurality of second signals read from the plurality of memories in accordance with multiplexing positions of the plurality of second signals for the first signal.
1. A transmission device to multiplex in a first signal a plurality of second signals each having a low rate as compared with the first signal, the transmission device comprising:
a plurality of memories configured to store the plurality of second signals;
at least one processor configured to select one of the second signals read from the plurality of memories; and
the at least one processor configured to control read timing to read the plurality of second signals from the plurality of memories and signal selection timing to select the one of the second signals by the at least one processor so as to execute rearrangement processing of the plurality of second signals read from the plurality of memories in accordance with cross-connect setting information for the plurality of second signals and shift processing of the plurality of second signals read from the plurality of memories in accordance with multiplexing positions of the plurality of second signals for the first signal;
wherein the at least one processor skips the reading of the plurality of second signal, at timing corresponding to a position at which pieces of frequency adjustment information of the plurality of second signals for the first signal are multiplexed in the first signal.
2. A transmission device to multiplex in a first signal a plurality of second signals each having a low rate as compared with the first signal, the transmission device comprising:
a plurality of memories configured to store the plurality of second signals;
at least one processor configured to select one of the second signals read from the plurality of memories; and
the at least one processor configured to control read timing to read the plurality of second signals from the plurality of memories and signal selection timing to select the one of the second signals by the at least one processor so as to execute rearrangement processing of the plurality of second signals read from the plurality of memories in accordance with cross-connect setting information for the plurality of second signals and shift processing of the plurality of second signals read from the plurality of memories in accordance with multiplexing positions of the plurality of second signals for the first signal;
wherein the at least one processor controls the read timing and the signal selection timing for the plurality of second signals that belong to an identical concatenation group, in accordance with concatenation setting of the plurality of second signals and commonly for the concatenation group.
3. The transmission device according to claim 1 , wherein
the at least one processor controls the read timing and the signal selection timing for the plurality of second signals that belong to an identical concatenation group, in accordance with concatenation setting of the plurality of second signals and commonly for the concatenation group.
4. A transmission device to multiplex in a first signal a plurality of second signals each having a low rate as compared with the first signal, the transmission device comprising:
a plurality of memories configured to store the plurality of second signals;
at least one processor configured to select one of the second signals read from the plurality of memories; and
the at least one processor configured to control read timing to read the plurality of second signals from the plurality of memories and signal selection timing to select the one of the second signals by the at least one processor so as to execute rearrangement processing of the plurality of second signals read from the plurality of memories in accordance with cross-connect setting information for the plurality of second signals and shift processing of the plurality of second signals read from the plurality of memories in accordance with multiplexing positions of the plurality of second signals for the first signal;
wherein the at least one processor skips the reading of the plurality of second signal, at timing corresponding to a position at which pieces of frequency adjustment information of the plurality of second signals for the first signal are multiplexed in the first signal so as to generate free fields into which overhead data and stuff control data are to be inserted in the first signal.