IP Library › Granted Patent US 9,660,017
Granted Patent B2
US 9,660,017 · App. 14/925,995 · Granted May 23, 2017

Microelectronic package with surface mounted passive element

Inventors: Chao-Yang Yeh (New Taipei, TW); Chee-Kong Ung (Hsinchu, TW); Tzu-Hung Lin (Hsinchu County, TW); Jia-Wei Fang (Hsinchu, TW)
Assignee: MEDIATEK INC.
H01L28/40H01L23/3157H01L23/49816H01L24/09H01L24/19H01L25/16H01L28/10H01L28/20H01L24/13H01L24/16H01L24/32H01L24/73H01L24/92H01L2224/02371H01L2224/0401H01L2224/04105H01L2224/12105H01L2224/131H01L2224/16227H01L2224/16265H01L2224/32225H01L2224/73204H01L2224/92125H01L2924/15159H01L2924/15311H01L2924/18162H01L2924/19041H01L2924/19042H01L2924/19043H01L2924/19103H01L2924/19104
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Quick Facts
Patent No.
US 9,660,017
App. No.
14/925,995
Granted
May 23, 2017
Kind
B2
Abstract

A microelectronic package includes a packaging substrate having a chip mounting surface; a chip mounted on the chip mounting surface of the packaging substrate with the chip's active surface facing down to the chip mounting surface; a plurality of input/output (I/O) pads distributed on the active surface of the chip; and a discrete passive element mounted on the active surface of the chip. The discrete passive element may be a decoupling capacitor, a resistor, or an inductor.

Claims (15)

1. A microelectronic package, comprising:

a packaging substrate having a chip mounting surface;

a chip mounted on the chip mounting surface of the packaging substrate with the chip's active surface facing down to the chip mounting surface;

a plurality of input/output (I/O) pads distributed on the active surface of the chip;

a redistribution layer (RDL) structure directly on the active surface of the chip between the chip and the chip mounting surface of the packaging substrate;

a cavity recessed into the RDL structure; and

a discrete passive element mounted within the cavity.

2. The microelectronic package according to claim 1 , wherein four side edges of the chip are encapsulated and surrounded by a molding compound.

3. The microelectronic package according to claim 1 , wherein the discrete passive element comprises a decoupling capacitor, a resistor, or an inductor.

4. The microelectronic package according to claim 1 , wherein the plurality of I/O pads comprise a ground I/O pad and a power I/O pad.

5. The microelectronic package according to claim 4 , wherein the discrete passive element is a decoupling capacitor comprising a first terminal and a second terminal, and wherein the first terminal is electrically connected to the ground I/O pad through a first bump pad in the RDL structure and the second terminal is electrically connected to the power I/O pad through a second bump pad in the RDL structure.

6. The microelectronic package according to claim 1 , wherein the discrete passive element is directly mounted on the RDL structure.

7. The microelectronic package according to claim 1 further comprising a plurality of bumps on RDL structure.

8. The microelectronic package according to claim 7 , wherein the plurality of bumps has a bump height.

9. The microelectronic package according to claim 8 , wherein the discrete passive element has a thickness smaller than the bump height.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 29, 2015
From: YEH, CHAO-YANG; UNG, CHEE-KONG; LIN, TZU-HUNG; FANG, JIA-WEI
To: MEDIATEK INC.
Reel/Frame 036908/0196 →
Continuity (3)
Provisional Application 62105435 · Jan 20, 2015
Provisional Application 62134014 · Mar 17, 2015
Related Publication 20160211318A1 · Jul 21, 2016