IP Library › Granted Patent US 9,679,850
Granted Patent B2
US 9,679,850 · App. 14/928,633 · Granted Jun 13, 2017

Method of fabricating semiconductor structure

Inventors: Wei Ting Chen (Hsinchu, TW); Che-Cheng Chang (New Taipei, TW); Chen-Hsiang Lu (Hsin-Chu, TW); Yu-Cheng Liu (Hsinchu County, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
H01L23/53238H01L21/0332H01L21/31116H01L21/31144H01L21/76804H01L21/76843H01L21/76871H01L21/76877H01L23/528H01L23/5226H01L23/5329
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Quick Facts
Patent No.
US 9,679,850
App. No.
14/928,633
Granted
Jun 13, 2017
Kind
B2
Abstract

A semiconductor structure having tapered damascene aperture is disclosed. The semiconductor structure including an etching stop layer over an inter-layer dielectric (ILD) layer, a low-k dielectric layer over the etching stop layer, and a tapered aperture at least going into the low-k dielectric layer; wherein the tapered aperture is filled with copper (Cu), a width of a mouth surface portion of the aperture tapers inwardly from a first, wider width to a second, narrower width at a bottom surface portion of the aperture, and the width of the bottom surface portion of the tapered aperture is less than 50 nm. Associated methods of fabricating a semiconductor structure are also disclosed.

Claims (40)

1. A method of fabricating a semiconductor structure, comprising:

forming an etching stop layer over an inter-layer dielectric (ILD) layer;

forming a dielectric layer over the etching stop layer;

forming a nitrogen free anti-reflection layer (NFARL) over the dielectric layer;

forming a metal-hard-mask (MHM) layer over the NFARL;

forming a tapered aperture at least going through the MHM layer, the NFARL and into the dielectric layer; and

filling the tapered aperture with copper;

wherein the tapered aperture tapers inwardly from a mouth surface portion to a bottom surface portion, wherein a width of the mouth surface portion is greater than a width of the bottom surface portion, and the width of the bottom surface portion is less than about 50 nm.

2. The method of claim 1 , wherein the tapered aperture goes through the dielectric layer and stops at the etching stop layer.

3. The method of claim 1 , further comprising depositing a barrier layer covering sidewalls and the bottom surface of the tapered aperture.

4. The method of claim 3 , further comprising depositing a seed layer over the barrier layer.

5. The method of claim 1 , wherein the MHM layer comprises TiN.

6. The method of claim 1 , wherein the mouth surface portion at the upper end around a top corner of the tapered aperture has a geometric polygonal shape seen from a cross-sectional view.

7. The method of claim 1 , wherein the mouth surface portion at the upper end around a top corner of the tapered aperture has a continuous curved shape seen from a cross-sectional view.

8. A method of fabricating a semiconductor structure, comprising:

forming an etching stop layer over an inter-layer dielectric (ILD) layer;

forming a dielectric layer over the etching stop layer;

forming a nitrogen free anti-reflection layer (NFARL) over the dielectric layer;

forming a metal-hard-mask (MHM) layer over the NFARL;

performing an etch operation to form a tapered aperture at least going through the MHM layer, the NFARL and into the dielectric layer; and

filling the tapered aperture with copper;

wherein the tapered aperture tapers inwardly from a mouth surface portion to a bottom surface portion, wherein a width of the mouth surface portion is greater than a width of the bottom surface portion, and the width of the bottom surface portion is less than about 50 nm.

9. The method of claim 8 , wherein the tapered aperture goes through the dielectric layer and stops at the etching stop layer.

10. The method of claim 8 , wherein the performing of the etch operation comprises applying an etching bias power having a range of about 100 W-1000 W.

11. The method of claim 8 , wherein the performing of the etch operation comprises using plasma etching gas including octafluorocyclobutane (C 4 F 8 ) gas.

12. The method of claim 8 , wherein the performing of the etch operation comprises using plasma etching gas including tetrafluoromethane (CF 4 ) gas.

13. A method of fabricating a semiconductor structure, comprising:

providing a dielectric layer;

forming a first layer over the dielectric layer;

forming a second layer over the first layer;

forming a first opening in the second layer to expose a portion of the first layer;

forming a second opening at the exposed first layer to expose a portion of the dielectric layer, wherein a diameter of a top of the second opening is narrower than a diameter of a bottom of the first opening; and

performing an etch operation upon the first opening and the second opening to form a tapered aperture at least going through the first layer, the second layer and into the dielectric layer.

14. The method of claim 13 , further comprising filling the tapered aperture with copper, wherein the tapered aperture tapers inwardly from a mouth surface portion to a bottom surface portion, wherein a width of the mouth surface portion is greater than a width of the bottom surface portion, and the width of the bottom surface portion is less than about 50 nm.

15. The method of claim 13 , wherein the first layer comprises nitrogen free anti-reflection layer (NFARL).

16. The method of claim 13 , wherein the second layer comprises TiN, Ti, Ta, W, TaN or WN.

17. The method of claim 14 , further comprising depositing a barrier layer covering sidewalls and the bottom surface of the aperture.

18. The method of claim 17 , further comprising depositing a seed layer over the barrier layer.

19. The method of claim 14 , wherein the mouth surface portion at the upper end around a top corner of the tapered aperture has a geometric polygonal shape seen from a cross-sectional view.

20. The method of claim 14 , wherein the mouth surface portion at the upper end around a top corner of the tapered aperture has a continuous curved shape seen from a cross-sectional view.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 12, 2016
From: CHEN, WEI TING; CHANG, CHE-CHENG; LU, CHEN-HSIANG; LIU, YU-CHENG
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Reel/Frame 039138/0755 →
Continuity (1)
Related Publication 20170125353A1 · May 4, 2017